forked from Mirror/GodMode9
- properly align ARM11 stacks and buffers
- add very simple exception dumping for the ARM11
This commit is contained in:
Wolfvak
d0k3
parent
3e25393284
commit
fd5320b86f
2
Makefile
2
Makefile
@ -31,7 +31,7 @@ export INCLUDE := -I"$(shell pwd)/common"
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export ASFLAGS := -g -x assembler-with-cpp $(INCLUDE)
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export CFLAGS := -DDBUILTS="\"$(DBUILTS)\"" -DDBUILTL="\"$(DBUILTL)\"" -DVERSION="\"$(VERSION)\"" -DFLAVOR="\"$(FLAVOR)\"" \
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-g -Os -Wall -Wextra -Wpedantic -Wcast-align -Wformat=2 -Wno-main \
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-g -Os -Wall -Wextra -Wcast-align -Wformat=2 -Wno-main \
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-fomit-frame-pointer -ffast-math -std=gnu11 -MMD -MP \
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-Wno-unused-function -Wno-format-truncation $(INCLUDE) -ffunction-sections -fdata-sections
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export LDFLAGS := -Tlink.ld -nostartfiles -Wl,--gc-sections,-z,max-page-size=512
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@ -10,8 +10,8 @@ INCDIRS := source
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INCLUDE := $(foreach dir,$(INCDIRS),-I"$(shell pwd)/$(dir)")
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ASFLAGS += $(SUBARCH) $(INCLUDE)
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CFLAGS += $(SUBARCH) $(INCLUDE)
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LDFLAGS += $(SUBARCH) -Wl,-Map,$(TARGET).map
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CFLAGS += $(SUBARCH) $(INCLUDE) -flto
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LDFLAGS += $(SUBARCH) -Wl,-Map,$(TARGET).map -flto
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include ../Makefile.common
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include ../Makefile.build
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217
arm11/source/arm/exception.c
Normal file
217
arm11/source/arm/exception.c
Normal file
@ -0,0 +1,217 @@
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/*
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* This file is part of GodMode9
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* Copyright (C) 2019 Wolfvak
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <types.h>
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#include <arm.h>
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#include <vram.h>
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static const u8 num_font[16*8];
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#define SCREEN ((u16*)(VRAM_TOP_LA))
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void draw_char(u16 *fb, int c, int x, int y)
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{
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for (int _y = 0; _y < 8; _y++) {
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for (int _x = 0; _x < 8; _x++) {
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u16 *fbpos = fb + (240 - (y + _y)) + (240 * (x + _x));
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u8 mask = (num_font[(c * 8) + _y] >> (8 - _x)) & 1;
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if (mask)
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*fbpos = ~0;
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else
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*fbpos = 0;
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}
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}
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}
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void draw_hex(u16 *fb, u32 num, int x, int y)
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{
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x += 7*8;
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for (int i = 0; i < 8; i++) {
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draw_char(fb, num & 0xf, x, y);
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num >>= 4;
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x -= 8;
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}
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}
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void do_exception(u32 type, u32 *regs)
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{
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for (int i = 0; i < 400*240; i++)
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SCREEN[i] = 0;
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draw_hex(SCREEN, type, 8, 16);
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for (int i = 0; i < 20; i += 2) {
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draw_hex(SCREEN, i, 8, 32 + (i * 4));
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draw_hex(SCREEN, regs[i], 80, 32 + (i * 4));
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draw_hex(SCREEN, i + 1, 208, 32 + (i * 4));
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draw_hex(SCREEN, regs[i + 1], 280, 32 + (i * 4));
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}
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while(1)
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ARM_WFI();
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}
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static const u8 num_font[] = {
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0b00000000,
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0b00011000,
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0b00100100,
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0b00101100,
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0b00110100,
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0b00100100,
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0b00011000,
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0b00000000, // 0
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0b00000000,
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0b00011000,
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0b00101000,
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0b00001000,
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0b00001000,
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0b00001000,
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0b00111100,
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0b00000000, // 1
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0b00000000,
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0b00011000,
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0b00100100,
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0b00000100,
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0b00001000,
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0b00010000,
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0b00111100,
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0b00000000, // 2
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0b00000000,
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0b00111000,
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0b00000100,
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0b00011000,
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0b00000100,
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0b00000100,
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0b00111000,
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0b00000000, // 3
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0b00000000,
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0b00100100,
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0b00100100,
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0b00111100,
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0b00000100,
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0b00000100,
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0b00000100,
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0b00000000, // 4
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0b00000000,
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0b00111100,
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0b00100000,
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0b00111000,
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0b00000100,
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0b00000100,
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0b00111000,
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0b00000000, // 5
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0b00000000,
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0b00011100,
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0b00100000,
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0b00111000,
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0b00100100,
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0b00100100,
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0b00011000,
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0b00000000, // 6
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0b00000000,
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0b00111100,
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0b00000100,
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0b00000100,
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0b00001000,
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0b00010000,
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0b00010000,
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0b00000000, // 7
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0b00000000,
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0b00011000,
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0b00100100,
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0b00011000,
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0b00100100,
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0b00100100,
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0b00011000,
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0b00000000, // 8
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0b00000000,
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0b00011000,
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0b00100100,
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0b00011100,
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0b00000100,
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0b00000100,
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0b00111000,
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0b00000000, // 9
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0b00000000,
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0b00011000,
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0b00100100,
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0b00111100,
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0b00100100,
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0b00100100,
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0b00100100,
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0b00000000, // A
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0b00000000,
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0b00111000,
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0b00100100,
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0b00111000,
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0b00100100,
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0b00100100,
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0b00111000,
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0b00000000, // B
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0b00000000,
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0b00011100,
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0b00100000,
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0b00100000,
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0b00100000,
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0b00100000,
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0b00011100,
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0b00000000, // C
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0b00000000,
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0b00110000,
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0b00101000,
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0b00100100,
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0b00100100,
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0b00101000,
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0b00110000,
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0b00000000, // C
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0b00000000,
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0b00111100,
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0b00100000,
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0b00111100,
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0b00100000,
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0b00100000,
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0b00111100,
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0b00000000, // E
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0b00000000,
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0b00111100,
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0b00100000,
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0b00111100,
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0b00100000,
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0b00100000,
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0b00100000,
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0b00000000, // F
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};
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@ -16,31 +16,88 @@
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* This is almost the same as the ARM9 exception handler,
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* but with a few extra register dumps (DFSR, IFSR and FAR)
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*/
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#include <arm.h>
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.arm
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.align 3
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.macro TRAP_ENTRY xrq
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msr cpsr_f, #(\xrq << 29)
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b XRQ_Main
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.endm
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.section .vector, "ax"
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vectors:
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b XRQ_Reset @ RESET
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b XRQ_Reset @ UNDEFINED
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b XRQ_Reset @ SVC
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b XRQ_Reset @ PREFETCH ABORT
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b XRQ_Reset @ DATA ABORT
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b XRQ_Reset @ RESERVED
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b XRQ_IRQ @ IRQ
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b XRQ_Reset @ FIQ
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b XRQ_Reset
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b XRQ_Undefined
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b XRQ_SVC
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b XRQ_PrefetchAbt
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b XRQ_DataAbt
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b XRQ_Reserved
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b XRQ_IRQ
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b XRQ_FIQ
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XRQ_Reset:
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mov r0, #0x18000000
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add r1, r0, #(6 << 20)
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mov r2, #0xFFFFFFFF
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1:
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cmp r0, r1
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strne r2, [r0], #4
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moveq r0, #0x18000000
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b 1b
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TRAP_ENTRY 0
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XRQ_Undefined:
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TRAP_ENTRY 1
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XRQ_SVC:
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TRAP_ENTRY 2
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XRQ_PrefetchAbt:
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TRAP_ENTRY 3
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XRQ_DataAbt:
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TRAP_ENTRY 4
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XRQ_Reserved:
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TRAP_ENTRY 5
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XRQ_FIQ:
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TRAP_ENTRY 7
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XRQ_Main:
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ldr sp, =(exception_stack_top - 32*4)
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stmia sp, {r0-r7}
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cpsid aif
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mrs r1, cpsr
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lsr r0, r1, #29
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mrs r2, spsr
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str lr, [sp, #15*4]
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str r2, [sp, #16*4]
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ands r2, r2, #SR_PMODE_MASK
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orreq r2, r2, #SR_SYS_MODE
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orr r2, r2, #(0x10 | SR_NOINT)
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add r3, sp, #8*4
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msr cpsr_c, r2
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nop
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nop
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stmia r3!, {r8-r14}
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nop
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nop
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msr cpsr_c, r1
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mrc p15, 0, r4, c5, c0, 0 @ data fault status register
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mrc p15, 0, r5, c5, c0, 1 @ instruction fault status register
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mrc p15, 0, r6, c6, c0, 0 @ data fault address
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add r3, r3, #2*4 @ skip saved PC and CPSR
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stmia r3!, {r4, r5, r6}
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mov r1, sp
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bl do_exception
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XRQ_IRQ:
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sub lr, lr, #4 @ Fix return address
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@ -58,3 +115,10 @@ XRQ_IRQ:
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pop {r0-r4, r12, lr}
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rfeia sp! @ Return from exception
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.section .bss.xrq_stk
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.align 12
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exception_stack: @ reserve a single aligned page for the exception stack
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.space 4096
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exception_stack_top:
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.global exception_stack_top
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@ -21,7 +21,7 @@
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#include <arm.h>
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#define STACK_SZ (16384)
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#define STACK_SZ (8192)
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.global __boot
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__boot:
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@ -95,9 +95,11 @@ corezero_start:
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coresmp_start:
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bl SYS_CoreInit
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b MainLoop
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ldr lr, =MainLoop
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bx lr
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.section .bss.stack
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.align 3
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.align 12 @ make sure stack is aligned to a page boundary
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.global _stack_base
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_stack_base:
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.space (MAX_CPU * STACK_SZ)
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@ -122,8 +122,7 @@ int SPI_DoXfer(u32 dev, const SPI_XferInfo *xfers, u32 xfer_cnt)
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void SPI_Init(void)
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{
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// This cuts off access from the old SPI
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// interface used during the NDS days
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// This cuts off access to the old NDS SPI interface
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*REG_CFG_SPI_CNT = 7;
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}
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@ -21,7 +21,7 @@
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#include "system/xalloc.h"
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static char xalloc_buf[XALLOC_BUF_SIZE];
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static char ALIGN(4096) xalloc_buf[XALLOC_BUF_SIZE];
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static size_t mark = 0;
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void *XAlloc(size_t size)
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@ -15,6 +15,7 @@ static bool I2C_AllocBuffer(void)
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return false;
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i2c_xfer_buf = (char*)xbuf;
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}
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return true;
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}
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@ -41,11 +42,12 @@ bool I2C_readRegBuf(I2cDevice devId, u8 regAddr, u8 *out, u32 size)
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bool I2C_writeRegBuf(I2cDevice devId, u8 regAddr, const u8 *in, u32 size)
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{
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int ret;
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u32 *args;
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if (!I2C_AllocBuffer())
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return false;
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u32 args[] = {devId, regAddr, (u32)i2c_xfer_buf, size};
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args = (u32[]){devId, regAddr, (u32)i2c_xfer_buf, size};
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memcpy(i2c_xfer_buf, in, size);
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ARM_WbDC_Range(i2c_xfer_buf, size);
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@ -4,7 +4,7 @@
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#define SPIFLASH_CHUNK_SIZE (0x1000)
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static char *spiflash_xalloc_buf = NULL;
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static char *spiflash_xfer_buf = NULL;
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bool spiflash_get_status(void)
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{
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@ -15,29 +15,29 @@ bool spiflash_read(u32 offset, u32 size, u8 *buf)
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{
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u32 args[3];
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if (!spiflash_xalloc_buf) {
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if (!spiflash_xfer_buf) {
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u32 xbuf = PXI_DoCMD(PXI_XALLOC, (u32[]){SPIFLASH_CHUNK_SIZE}, 1);
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if (xbuf == 0 || xbuf == 0xFFFFFFFF)
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return false;
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spiflash_xalloc_buf = (char*)xbuf;
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spiflash_xfer_buf = (char*)xbuf;
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}
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args[1] = (u32)spiflash_xalloc_buf;
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args[1] = (u32)spiflash_xfer_buf;
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while(size > 0) {
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u32 rem = min(size, SPIFLASH_CHUNK_SIZE);
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u32 blksz = min(size, SPIFLASH_CHUNK_SIZE);
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args[0] = offset;
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args[2] = rem;
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args[2] = blksz;
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ARM_DSB();
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PXI_DoCMD(PXI_NVRAM_READ, args, 3);
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ARM_InvDC_Range(spiflash_xalloc_buf, rem);
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memcpy(buf, spiflash_xalloc_buf, rem);
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ARM_InvDC_Range(spiflash_xfer_buf, blksz);
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memcpy(buf, spiflash_xfer_buf, blksz);
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buf += rem;
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size -= rem;
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offset += rem;
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buf += blksz;
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size -= blksz;
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offset += blksz;
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}
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return true;
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@ -10,7 +10,7 @@
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#define SR_ABT_MODE (0x17)
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#define SR_UND_MODE (0x1B)
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#define SR_SYS_MODE (0x1F)
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#define SR_PMODE_MASK (0x1F)
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#define SR_PMODE_MASK (0x0F)
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#define SR_THUMB BIT(5)
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#define SR_NOFIQ BIT(6)
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@ -56,7 +56,11 @@
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(sizeof(x) / sizeof(*(x)))
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#define bkpt \
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asm volatile("bkpt\n\t")
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__builtin_trap()
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#define assert(x) \
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(!!(x) ? (void)0 : __builtin_trap())
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#define STATIC_ASSERT(...) \
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_Static_assert((__VA_ARGS__), #__VA_ARGS__)
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