Disable caches/mpu before changing MPU settings

This commit is contained in:
Aurora 2016-06-09 16:52:12 +02:00
parent bc97bc8af1
commit a7c43cd93f

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@ -5,6 +5,13 @@ _start:
@ Change the stack pointer @ Change the stack pointer
mov sp, #0x27000000 mov sp, #0x27000000
@ Disable caches / MPU
mrc p15, 0, r0, c1, c0, 0 @ read control register
bic r0, #(1<<12) @ - instruction cache disable
bic r0, #(1<<2) @ - data cache disable
bic r0, #(1<<0) @ - mpu disable
mcr p15, 0, r0, c1, c0, 0 @ write control register
@ Give read/write access to all the memory regions @ Give read/write access to all the memory regions
ldr r0, =0x33333333 ldr r0, =0x33333333
mcr p15, 0, r0, c5, c0, 2 @ write data access mcr p15, 0, r0, c5, c0, 2 @ write data access
@ -32,7 +39,7 @@ _start:
mcr p15, 0, r8, c2, c0, 0 @ Data cacheable 0, 3, 5 mcr p15, 0, r8, c2, c0, 0 @ Data cacheable 0, 3, 5
mcr p15, 0, r8, c2, c0, 1 @ Inst cacheable 0, 3, 5 mcr p15, 0, r8, c2, c0, 1 @ Inst cacheable 0, 3, 5
@ Enable caches @ Enable caches / MPU
mrc p15, 0, r0, c1, c0, 0 @ read control register mrc p15, 0, r0, c1, c0, 0 @ read control register
orr r0, r0, #(1<<12) @ - instruction cache enable orr r0, r0, #(1<<12) @ - instruction cache enable
orr r0, r0, #(1<<2) @ - data cache enable orr r0, r0, #(1<<2) @ - data cache enable