Mirror/GodMode9
1
0
Fork 1
mirror of https://github.com/d0k3/GodMode9.git synced 2025-06-26 13:42:47 +00:00
Code Issues Packages Projects Releases Wiki Activity

sdmmc.c: Adjust eMMC clock to be in spec before switching to HS mode

Browse Source 
.. and some cleanup
This commit is contained in:
d0k3 2018-06-04 00:34:39 +02:00
parent 568db1d471
commit 0cbcce5579
2 changed files with 164 additions and 165 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

147
arm9/source/nand/sdmmc.c
View File

@ -48,7 +48,7 @@ static int get_error(struct mmcdevice *ctx)
static void set_target(struct mmcdevice *ctx) static void set_target(struct mmcdevice *ctx)
{ {
sdmmc_mask16(REG_SDPORTSEL,0x3,(uint16_t)ctx->devicenumber); sdmmc_mask16(REG_SDPORTSEL,0x3,(u16)ctx->devicenumber);
setckl(ctx->clk); setckl(ctx->clk);
if(ctx->SDOPT == 0) if(ctx->SDOPT == 0)
{ {
@ -60,10 +60,10 @@ static void set_target(struct mmcdevice *ctx)
} }
} }
static void sdmmc_send_command(struct mmcdevice *ctx, uint32_t cmd, uint32_t args) static void sdmmc_send_command(struct mmcdevice *ctx, u32 cmd, u32 args)
{ {
const bool getSDRESP = (cmd << 15) >> 31; const bool getSDRESP = (cmd << 15) >> 31;
uint16_t flags = (cmd << 15) >> 31; u16 flags = (cmd << 15) >> 31;
const bool readdata = cmd & 0x20000; const bool readdata = cmd & 0x20000;
const bool writedata = cmd & 0x40000; const bool writedata = cmd & 0x40000;
@ -83,8 +83,8 @@ static void sdmmc_send_command(struct mmcdevice *ctx, uint32_t cmd, uint32_t arg
sdmmc_write16(REG_SDCMDARG1,args >> 16); sdmmc_write16(REG_SDCMDARG1,args >> 16);
sdmmc_write16(REG_SDCMD,cmd &0xFFFF); sdmmc_write16(REG_SDCMD,cmd &0xFFFF);
uint32_t size = ctx->size; u32 size = ctx->size;
const uint16_t blkSize = sdmmc_read16(REG_SDBLKLEN32); const u16 blkSize = sdmmc_read16(REG_SDBLKLEN32);
u32 *rDataPtr32 = (u32*)(void*)ctx->rData; u32 *rDataPtr32 = (u32*)(void*)ctx->rData;
u8 *rDataPtr8 = ctx->rData; u8 *rDataPtr8 = ctx->rData;
const u32 *tDataPtr32 = (u32*)(void*)ctx->tData; const u32 *tDataPtr32 = (u32*)(void*)ctx->tData;
@ -93,12 +93,12 @@ static void sdmmc_send_command(struct mmcdevice *ctx, uint32_t cmd, uint32_t arg
bool rUseBuf = ( NULL != rDataPtr32 ); bool rUseBuf = ( NULL != rDataPtr32 );
bool tUseBuf = ( NULL != tDataPtr32 ); bool tUseBuf = ( NULL != tDataPtr32 );
uint16_t status0 = 0; u16 status0 = 0;
while(1) while(1)
{ {
volatile uint16_t status1 = sdmmc_read16(REG_SDSTATUS1); volatile u16 status1 = sdmmc_read16(REG_SDSTATUS1);
#ifdef DATA32_SUPPORT #ifdef DATA32_SUPPORT
volatile uint16_t ctl32 = sdmmc_read16(REG_DATACTL32); volatile u16 ctl32 = sdmmc_read16(REG_DATACTL32);
if((ctl32 & 0x100)) if((ctl32 & 0x100))
#else #else
if((status1 & TMIO_STAT1_RXRDY)) if((status1 & TMIO_STAT1_RXRDY))
@ -114,14 +114,14 @@ static void sdmmc_send_command(struct mmcdevice *ctx, uint32_t cmd, uint32_t arg
#ifdef DATA32_SUPPORT #ifdef DATA32_SUPPORT
if(!((u32)rDataPtr32 & 3)) if(!((u32)rDataPtr32 & 3))
{ {
for(uint32_t i = 0; i < blkSize; i += 4) for(u32 i = 0; i < blkSize; i += 4)
{ {
*rDataPtr32++ = sdmmc_read32(REG_SDFIFO32); *rDataPtr32++ = sdmmc_read32(REG_SDFIFO32);
} }
} }
else else
{ {
for(uint32_t i = 0; i < blkSize; i += 4) for(u32 i = 0; i < blkSize; i += 4)
{ {
u32 data = sdmmc_read32(REG_SDFIFO32); u32 data = sdmmc_read32(REG_SDFIFO32);
*rDataPtr8++ = data; *rDataPtr8++ = data;
@ -133,14 +133,14 @@ static void sdmmc_send_command(struct mmcdevice *ctx, uint32_t cmd, uint32_t arg
#else #else
if(!((u32)rDataPtr16 & 1)) if(!((u32)rDataPtr16 & 1))
{ {
for(uint32_t i = 0; i < blkSize; i += 4) for(u32 i = 0; i < blkSize; i += 4)
{ {
*rDataPtr16++ = sdmmc_read16(REG_SDFIFO); *rDataPtr16++ = sdmmc_read16(REG_SDFIFO);
} }
} }
else else
{ {
for(uint32_t i = 0; i < blkSize; i += 4) for(u32 i = 0; i < blkSize; i += 4)
{ {
u16 data = sdmmc_read16(REG_SDFIFO); u16 data = sdmmc_read16(REG_SDFIFO);
*rDataPtr8++ = data; *rDataPtr8++ = data;
@ -171,36 +171,36 @@ static void sdmmc_send_command(struct mmcdevice *ctx, uint32_t cmd, uint32_t arg
#ifdef DATA32_SUPPORT #ifdef DATA32_SUPPORT
if(!((u32)tDataPtr32 & 3)) if(!((u32)tDataPtr32 & 3))
{ {
for(uint32_t i = 0; i < blkSize; i += 4) for(u32 i = 0; i < blkSize; i += 4)
{ {
sdmmc_write32(REG_SDFIFO32, *tDataPtr32++); sdmmc_write32(REG_SDFIFO32, *tDataPtr32++);
} }
} }
else else
{ {
for(uint32_t i = 0; i < blkSize; i += 4) for(u32 i = 0; i < blkSize; i += 4)
{ {
uint32_t data = *tDataPtr8++; u32 data = *tDataPtr8++;
data |= (uint32_t)*tDataPtr8++ << 8; data |= (u32)*tDataPtr8++ << 8;
data |= (uint32_t)*tDataPtr8++ << 16; data |= (u32)*tDataPtr8++ << 16;
data |= (uint32_t)*tDataPtr8++ << 24; data |= (u32)*tDataPtr8++ << 24;
sdmmc_write32(REG_SDFIFO32, data); sdmmc_write32(REG_SDFIFO32, data);
} }
} }
#else #else
if(!((u32)tDataPtr16 & 1)) if(!((u32)tDataPtr16 & 1))
{ {
for(uint32_t i = 0; i < blkSize; i += 2) for(u32 i = 0; i < blkSize; i += 2)
{ {
sdmmc_write16(REG_SDFIFO, *tDataPtr16++); sdmmc_write16(REG_SDFIFO, *tDataPtr16++);
} }
} }
else else
{ {
for(uint32_t i = 0; i < blkSize; i += 2) for(u32 i = 0; i < blkSize; i += 2)
{ {
uint16_t data = *tDataPtr8++; u16 data = *tDataPtr8++;
data |= (uint16_t)(*tDataPtr8++ << 8); data |= (u16)(*tDataPtr8++ << 8);
sdmmc_write16(REG_SDFIFO, data); sdmmc_write16(REG_SDFIFO, data);
} }
} }
@ -241,14 +241,14 @@ static void sdmmc_send_command(struct mmcdevice *ctx, uint32_t cmd, uint32_t arg
if(getSDRESP != 0) if(getSDRESP != 0)
{ {
ctx->ret[0] = (uint32_t)(sdmmc_read16(REG_SDRESP0) | (sdmmc_read16(REG_SDRESP1) << 16)); ctx->ret[0] = (u32)(sdmmc_read16(REG_SDRESP0) | (sdmmc_read16(REG_SDRESP1) << 16));
ctx->ret[1] = (uint32_t)(sdmmc_read16(REG_SDRESP2) | (sdmmc_read16(REG_SDRESP3) << 16)); ctx->ret[1] = (u32)(sdmmc_read16(REG_SDRESP2) | (sdmmc_read16(REG_SDRESP3) << 16));
ctx->ret[2] = (uint32_t)(sdmmc_read16(REG_SDRESP4) | (sdmmc_read16(REG_SDRESP5) << 16)); ctx->ret[2] = (u32)(sdmmc_read16(REG_SDRESP4) | (sdmmc_read16(REG_SDRESP5) << 16));
ctx->ret[3] = (uint32_t)(sdmmc_read16(REG_SDRESP6) | (sdmmc_read16(REG_SDRESP7) << 16)); ctx->ret[3] = (u32)(sdmmc_read16(REG_SDRESP6) | (sdmmc_read16(REG_SDRESP7) << 16));
} }
} }
int sdmmc_sdcard_writesectors(uint32_t sector_no, uint32_t numsectors, const uint8_t *in) int sdmmc_sdcard_writesectors(u32 sector_no, u32 numsectors, const u8 *in)
{ {
if(handleSD.isSDHC == 0) sector_no <<= 9; if(handleSD.isSDHC == 0) sector_no <<= 9;
set_target(&handleSD); set_target(&handleSD);
@ -264,7 +264,7 @@ int sdmmc_sdcard_writesectors(uint32_t sector_no, uint32_t numsectors, const uin
return get_error(&handleSD); return get_error(&handleSD);
} }
int sdmmc_sdcard_readsectors(uint32_t sector_no, uint32_t numsectors, uint8_t *out) int sdmmc_sdcard_readsectors(u32 sector_no, u32 numsectors, u8 *out)
{ {
if(handleSD.isSDHC == 0) sector_no <<= 9; if(handleSD.isSDHC == 0) sector_no <<= 9;
set_target(&handleSD); set_target(&handleSD);
@ -282,7 +282,7 @@ int sdmmc_sdcard_readsectors(uint32_t sector_no, uint32_t numsectors, uint8_t *o
int sdmmc_nand_readsectors(uint32_t sector_no, uint32_t numsectors, uint8_t *out) int sdmmc_nand_readsectors(u32 sector_no, u32 numsectors, u8 *out)
{ {
if(handleNAND.isSDHC == 0) sector_no <<= 9; if(handleNAND.isSDHC == 0) sector_no <<= 9;
set_target(&handleNAND); set_target(&handleNAND);
@ -298,7 +298,7 @@ int sdmmc_nand_readsectors(uint32_t sector_no, uint32_t numsectors, uint8_t *out
return get_error(&handleNAND); return get_error(&handleNAND);
} }
int sdmmc_nand_writesectors(uint32_t sector_no, uint32_t numsectors, const uint8_t *in) //experimental int sdmmc_nand_writesectors(u32 sector_no, u32 numsectors, const u8 *in) //experimental
{ {
if(handleNAND.isSDHC == 0) sector_no <<= 9; if(handleNAND.isSDHC == 0) sector_no <<= 9;
set_target(&handleNAND); set_target(&handleNAND);
@ -314,17 +314,17 @@ int sdmmc_nand_writesectors(uint32_t sector_no, uint32_t numsectors, const uint8
return get_error(&handleNAND); return get_error(&handleNAND);
} }
static uint32_t sdmmc_calc_size(uint8_t* csd, int type) static u32 sdmmc_calc_size(u8* csd, int type)
{ {
uint32_t result = 0; u32 result = 0;
if(type == -1) type = csd[14] >> 6; if(type == -1) type = csd[14] >> 6;
switch(type) switch(type)
{ {
case 0: case 0:
{ {
uint32_t block_len=csd[9]&0xf; u32 block_len=csd[9]&0xf;
block_len=1u<<block_len; block_len=1u<<block_len;
uint32_t mult=( uint32_t)((csd[4]>>7)|((csd[5]&3)<<1)); u32 mult=( u32)((csd[4]>>7)|((csd[5]&3)<<1));
mult=1u<<(mult+2); mult=1u<<(mult+2);
result=csd[8]&3; result=csd[8]&3;
result=(result<<8)|csd[7]; result=(result<<8)|csd[7];
@ -362,41 +362,41 @@ void sdmmc_init()
handleSD.clk = 0x20; // 523.655968 KHz handleSD.clk = 0x20; // 523.655968 KHz
handleSD.devicenumber = 0; handleSD.devicenumber = 0;
*(volatile uint16_t*)0x10006100 &= 0xF7FFu; //SDDATACTL32 *(vu16*)0x10006100 &= 0xF7FFu; //SDDATACTL32
*(volatile uint16_t*)0x10006100 &= 0xEFFFu; //SDDATACTL32 *(vu16*)0x10006100 &= 0xEFFFu; //SDDATACTL32
#ifdef DATA32_SUPPORT #ifdef DATA32_SUPPORT
*(volatile uint16_t*)0x10006100 |= 0x402u; //SDDATACTL32 *(vu16*)0x10006100 |= 0x402u; //SDDATACTL32
#else #else
*(volatile uint16_t*)0x10006100 |= 0x402u; //SDDATACTL32 *(vu16*)0x10006100 |= 0x402u; //SDDATACTL32
#endif #endif
*(volatile uint16_t*)0x100060D8 = (*(volatile uint16_t*)0x100060D8 & 0xFFDD) | 2; *(vu16*)0x100060D8 = (*(vu16*)0x100060D8 & 0xFFDD) | 2;
#ifdef DATA32_SUPPORT #ifdef DATA32_SUPPORT
*(volatile uint16_t*)0x10006100 &= 0xFFFFu; //SDDATACTL32 *(vu16*)0x10006100 &= 0xFFFFu; //SDDATACTL32
*(volatile uint16_t*)0x100060D8 &= 0xFFDFu; //SDDATACTL *(vu16*)0x100060D8 &= 0xFFDFu; //SDDATACTL
*(volatile uint16_t*)0x10006104 = 512; //SDBLKLEN32 *(vu16*)0x10006104 = 512; //SDBLKLEN32
#else #else
*(volatile uint16_t*)0x10006100 &= 0xFFFDu; //SDDATACTL32 *(vu16*)0x10006100 &= 0xFFFDu; //SDDATACTL32
*(volatile uint16_t*)0x100060D8 &= 0xFFDDu; //SDDATACTL *(vu16*)0x100060D8 &= 0xFFDDu; //SDDATACTL
*(volatile uint16_t*)0x10006104 = 0; //SDBLKLEN32 *(vu16*)0x10006104 = 0; //SDBLKLEN32
#endif #endif
*(volatile uint16_t*)0x10006108 = 1; //SDBLKCOUNT32 *(vu16*)0x10006108 = 1; //SDBLKCOUNT32
*(volatile uint16_t*)0x100060E0 &= 0xFFFEu; //SDRESET *(vu16*)0x100060E0 &= 0xFFFEu; //SDRESET
*(volatile uint16_t*)0x100060E0 |= 1u; //SDRESET *(vu16*)0x100060E0 |= 1u; //SDRESET
*(volatile uint16_t*)0x10006020 |= TMIO_MASK_ALL; //SDIR_MASK0 *(vu16*)0x10006020 |= TMIO_MASK_ALL; //SDIR_MASK0
*(volatile uint16_t*)0x10006022 |= TMIO_MASK_ALL>>16; //SDIR_MASK1 *(vu16*)0x10006022 |= TMIO_MASK_ALL>>16; //SDIR_MASK1
*(volatile uint16_t*)0x100060FC |= 0xDBu; //SDCTL_RESERVED7 *(vu16*)0x100060FC |= 0xDBu; //SDCTL_RESERVED7
*(volatile uint16_t*)0x100060FE |= 0xDBu; //SDCTL_RESERVED8 *(vu16*)0x100060FE |= 0xDBu; //SDCTL_RESERVED8
*(volatile uint16_t*)0x10006002 &= 0xFFFCu; //SDPORTSEL *(vu16*)0x10006002 &= 0xFFFCu; //SDPORTSEL
#ifdef DATA32_SUPPORT #ifdef DATA32_SUPPORT
*(volatile uint16_t*)0x10006024 = 0x20; *(vu16*)0x10006024 = 0x20;
*(volatile uint16_t*)0x10006028 = 0x40E9; *(vu16*)0x10006028 = 0x40E9;
#else #else
*(volatile uint16_t*)0x10006024 = 0x40; //Nintendo sets this to 0x20 *(vu16*)0x10006024 = 0x40; //Nintendo sets this to 0x20
*(volatile uint16_t*)0x10006028 = 0x40E9; //Nintendo sets this to 0x40EE *(vu16*)0x10006028 = 0x40E9; //Nintendo sets this to 0x40EE
#endif #endif
*(volatile uint16_t*)0x10006002 &= 0xFFFCu; ////SDPORTSEL *(vu16*)0x10006002 &= 0xFFFCu; ////SDPORTSEL
*(volatile uint16_t*)0x10006026 = 512; //SDBLKLEN *(vu16*)0x10006026 = 512; //SDBLKLEN
*(volatile uint16_t*)0x10006008 = 0; //SDSTOP *(vu16*)0x10006008 = 0; //SDSTOP
} }
int Nand_Init() int Nand_Init()
@ -432,20 +432,21 @@ int Nand_Init()
sdmmc_send_command(&handleNAND,0x10609,handleNAND.initarg << 0x10); sdmmc_send_command(&handleNAND,0x10609,handleNAND.initarg << 0x10);
if((handleNAND.error & 0x4))return -1; if((handleNAND.error & 0x4))return -1;
handleNAND.total_size = sdmmc_calc_size((uint8_t*)&handleNAND.ret[0],0); handleNAND.total_size = sdmmc_calc_size((u8*)&handleNAND.ret[0],0);
handleNAND.clk = 0; // 33.513982 MHz setckl(0x201); // 16.756991 MHz
setckl(0);
sdmmc_send_command(&handleNAND,0x10407,handleNAND.initarg << 0x10); sdmmc_send_command(&handleNAND,0x10407,handleNAND.initarg << 0x10);
if((handleNAND.error & 0x4))return -1; if((handleNAND.error & 0x4))return -1;
handleNAND.SDOPT = 1; handleNAND.SDOPT = 1;
sdmmc_send_command(&handleNAND,0x10506,0x3B70100); // Set 4 bit bus width.
sdmmc_send_command(&handleNAND,0x10506,0x3B70100);
if((handleNAND.error & 0x4))return -1; if((handleNAND.error & 0x4))return -1;
sdmmc_mask16(REG_SDOPT, 0x8000, 0); // Switch to 4 bit mode.
sdmmc_send_command(&handleNAND,0x10506,0x3B90100); sdmmc_send_command(&handleNAND,0x10506,0x3B90100); // Switch to high speed timing.
if((handleNAND.error & 0x4))return -1; if((handleNAND.error & 0x4))return -1;
handleNAND.clk = 0x200; // 33.513982 MHz
setckl(0x200);
sdmmc_send_command(&handleNAND,0x1040D,handleNAND.initarg << 0x10); sdmmc_send_command(&handleNAND,0x1040D,handleNAND.initarg << 0x10);
if((handleNAND.error & 0x4))return -1; if((handleNAND.error & 0x4))return -1;
@ -453,8 +454,6 @@ int Nand_Init()
sdmmc_send_command(&handleNAND,0x10410,0x200); sdmmc_send_command(&handleNAND,0x10410,0x200);
if((handleNAND.error & 0x4))return -1; if((handleNAND.error & 0x4))return -1;
handleNAND.clk |= 0x200;
return 0; return 0;
} }
@ -474,9 +473,9 @@ int SD_Init()
sdmmc_send_command(&handleSD,0,0); sdmmc_send_command(&handleSD,0,0);
sdmmc_send_command(&handleSD,0x10408,0x1AA); sdmmc_send_command(&handleSD,0x10408,0x1AA);
uint32_t temp = (handleSD.error & 0x1) << 0x1E; u32 temp = (handleSD.error & 0x1) << 0x1E;
uint32_t temp2 = 0; u32 temp2 = 0;
do do
{ {
@ -506,8 +505,8 @@ int SD_Init()
// Command Class 10 support // Command Class 10 support
const bool cmd6Supported = ((u8*)handleSD.ret)[10] & 0x40; const bool cmd6Supported = ((u8*)handleSD.ret)[10] & 0x40;
handleSD.total_size = sdmmc_calc_size((uint8_t*)&handleSD.ret[0],-1); handleSD.total_size = sdmmc_calc_size((u8*)&handleSD.ret[0],-1);
setckl(1); setckl(0x201); // 16.756991 MHz
sdmmc_send_command(&handleSD,0x10507,handleSD.initarg << 0x10); sdmmc_send_command(&handleSD,0x10507,handleSD.initarg << 0x10);
if((handleSD.error & 0x4)) return -4; if((handleSD.error & 0x4)) return -4;
@ -541,7 +540,7 @@ int SD_Init()
if(handleSD.error & 0x4) return -9; if(handleSD.error & 0x4) return -9;
handleSD.clk = 0x200; // 33.513982 MHz handleSD.clk = 0x200; // 33.513982 MHz
setckl(0); setckl(0x200);
} }
else handleSD.clk = 0x201; // 16.756991 MHz else handleSD.clk = 0x201; // 16.756991 MHz
@ -554,7 +553,7 @@ int SD_Init()
return 0; return 0;
} }
int sdmmc_get_cid(bool isNand, uint32_t *info) int sdmmc_get_cid(bool isNand, u32 *info)
{ {
struct mmcdevice *device; struct mmcdevice *device;
if(isNand) if(isNand)

182
arm9/source/nand/sdmmc.h
View File

@ -28,77 +28,77 @@
#include <stdint.h> #include <stdint.h>
#include "types.h" #include "types.h"
#define SDMMC_BASE 0x10006000 #define SDMMC_BASE (0x10006000)
#define REG_SDCMD 0x00 #define REG_SDCMD (0x00)
#define REG_SDPORTSEL 0x02 #define REG_SDPORTSEL (0x02)
#define REG_SDCMDARG 0x04 #define REG_SDCMDARG (0x04)
#define REG_SDCMDARG0 0x04 #define REG_SDCMDARG0 (0x04)
#define REG_SDCMDARG1 0x06 #define REG_SDCMDARG1 (0x06)
#define REG_SDSTOP 0x08 #define REG_SDSTOP (0x08)
#define REG_SDBLKCOUNT 0x0a #define REG_SDBLKCOUNT (0x0a)
#define REG_SDRESP0 0x0c #define REG_SDRESP0 (0x0c)
#define REG_SDRESP1 0x0e #define REG_SDRESP1 (0x0e)
#define REG_SDRESP2 0x10 #define REG_SDRESP2 (0x10)
#define REG_SDRESP3 0x12 #define REG_SDRESP3 (0x12)
#define REG_SDRESP4 0x14 #define REG_SDRESP4 (0x14)
#define REG_SDRESP5 0x16 #define REG_SDRESP5 (0x16)
#define REG_SDRESP6 0x18 #define REG_SDRESP6 (0x18)
#define REG_SDRESP7 0x1a #define REG_SDRESP7 (0x1a)
#define REG_SDSTATUS0 0x1c #define REG_SDSTATUS0 (0x1c)
#define REG_SDSTATUS1 0x1e #define REG_SDSTATUS1 (0x1e)
#define REG_SDIRMASK0 0x20 #define REG_SDIRMASK0 (0x20)
#define REG_SDIRMASK1 0x22 #define REG_SDIRMASK1 (0x22)
#define REG_SDCLKCTL 0x24 #define REG_SDCLKCTL (0x24)
#define REG_SDBLKLEN 0x26 #define REG_SDBLKLEN (0x26)
#define REG_SDOPT 0x28 #define REG_SDOPT (0x28)
#define REG_SDFIFO 0x30 #define REG_SDFIFO (0x30)
#define REG_DATACTL 0xd8 #define REG_DATACTL (0xd8)
#define REG_SDRESET 0xe0 #define REG_SDRESET (0xe0)
#define REG_SDPROTECTED 0xf6 //bit 0 determines if sd is protected or not? #define REG_SDPROTECTED (0xf6) //bit 0 determines if sd is protected or not?
#define REG_DATACTL32 0x100 #define REG_DATACTL32 (0x100)
#define REG_SDBLKLEN32 0x104 #define REG_SDBLKLEN32 (0x104)
#define REG_SDBLKCOUNT32 0x108 #define REG_SDBLKCOUNT32 (0x108)
#define REG_SDFIFO32 0x10C #define REG_SDFIFO32 (0x10C)
#define REG_CLK_AND_WAIT_CTL 0x138 #define REG_CLK_AND_WAIT_CTL (0x138)
#define REG_RESET_SDIO 0x1e0 #define REG_RESET_SDIO (0x1e0)
#define TMIO_STAT0_CMDRESPEND 0x0001 #define TMIO_STAT0_CMDRESPEND (0x0001)
#define TMIO_STAT0_DATAEND 0x0004 #define TMIO_STAT0_DATAEND (0x0004)
#define TMIO_STAT0_CARD_REMOVE 0x0008 #define TMIO_STAT0_CARD_REMOVE (0x0008)
#define TMIO_STAT0_CARD_INSERT 0x0010 #define TMIO_STAT0_CARD_INSERT (0x0010)
#define TMIO_STAT0_SIGSTATE 0x0020 #define TMIO_STAT0_SIGSTATE (0x0020)
#define TMIO_STAT0_WRPROTECT 0x0080 #define TMIO_STAT0_WRPROTECT (0x0080)
#define TMIO_STAT0_CARD_REMOVE_A 0x0100 #define TMIO_STAT0_CARD_REMOVE_A (0x0100)
#define TMIO_STAT0_CARD_INSERT_A 0x0200 #define TMIO_STAT0_CARD_INSERT_A (0x0200)
#define TMIO_STAT0_SIGSTATE_A 0x0400 #define TMIO_STAT0_SIGSTATE_A (0x0400)
#define TMIO_STAT1_CMD_IDX_ERR 0x0001 #define TMIO_STAT1_CMD_IDX_ERR (0x0001)
#define TMIO_STAT1_CRCFAIL 0x0002 #define TMIO_STAT1_CRCFAIL (0x0002)
#define TMIO_STAT1_STOPBIT_ERR 0x0004 #define TMIO_STAT1_STOPBIT_ERR (0x0004)
#define TMIO_STAT1_DATATIMEOUT 0x0008 #define TMIO_STAT1_DATATIMEOUT (0x0008)
#define TMIO_STAT1_RXOVERFLOW 0x0010 #define TMIO_STAT1_RXOVERFLOW (0x0010)
#define TMIO_STAT1_TXUNDERRUN 0x0020 #define TMIO_STAT1_TXUNDERRUN (0x0020)
#define TMIO_STAT1_CMDTIMEOUT 0x0040 #define TMIO_STAT1_CMDTIMEOUT (0x0040)
#define TMIO_STAT1_RXRDY 0x0100 #define TMIO_STAT1_RXRDY (0x0100)
#define TMIO_STAT1_TXRQ 0x0200 #define TMIO_STAT1_TXRQ (0x0200)
#define TMIO_STAT1_ILL_FUNC 0x2000 #define TMIO_STAT1_ILL_FUNC (0x2000)
#define TMIO_STAT1_CMD_BUSY 0x4000 #define TMIO_STAT1_CMD_BUSY (0x4000)
#define TMIO_STAT1_ILL_ACCESS 0x8000 #define TMIO_STAT1_ILL_ACCESS (0x8000)
#define TMIO_MASK_ALL 0x837f031d #define TMIO_MASK_ALL (0x837F031D)
#define TMIO_MASK_GW (TMIO_STAT1_ILL_ACCESS | TMIO_STAT1_CMDTIMEOUT | TMIO_STAT1_TXUNDERRUN | TMIO_STAT1_RXOVERFLOW | \ #define TMIO_MASK_GW (TMIO_STAT1_ILL_ACCESS | TMIO_STAT1_CMDTIMEOUT | TMIO_STAT1_TXUNDERRUN | TMIO_STAT1_RXOVERFLOW | \
TMIO_STAT1_DATATIMEOUT | TMIO_STAT1_STOPBIT_ERR | TMIO_STAT1_CRCFAIL | TMIO_STAT1_CMD_IDX_ERR) TMIO_STAT1_DATATIMEOUT | TMIO_STAT1_STOPBIT_ERR | TMIO_STAT1_CRCFAIL | TMIO_STAT1_CMD_IDX_ERR)
#define TMIO_MASK_READOP (TMIO_STAT1_RXRDY | TMIO_STAT1_DATAEND) #define TMIO_MASK_READOP (TMIO_STAT1_RXRDY | TMIO_STAT1_DATAEND)
#define TMIO_MASK_WRITEOP (TMIO_STAT1_TXRQ | TMIO_STAT1_DATAEND) #define TMIO_MASK_WRITEOP (TMIO_STAT1_TXRQ | TMIO_STAT1_DATAEND)
#define SD_WRITE_PROTECTED (((*((vu16*)(SDMMC_BASE + REG_SDSTATUS0))) & (1 << 7 | 1 << 5)) == (1 << 5)) #define SD_WRITE_PROTECTED (((*((vu16*)(SDMMC_BASE + REG_SDSTATUS0))) & (1 << 7 | 1 << 5)) == (1 << 5))
@ -107,32 +107,32 @@ extern "C" {
#endif #endif
typedef struct mmcdevice { typedef struct mmcdevice {
uint8_t* rData; u8* rData;
const uint8_t* tData; const u8* tData;
uint32_t size; u32 size;
uint32_t error; u32 error;
uint16_t stat0; u16 stat0;
uint16_t stat1; u16 stat1;
uint32_t ret[4]; u32 ret[4];
uint32_t initarg; u32 initarg;
uint32_t isSDHC; u32 isSDHC;
uint32_t clk; u32 clk;
uint32_t SDOPT; u32 SDOPT;
uint32_t devicenumber; u32 devicenumber;
uint32_t total_size; //size in sectors of the device u32 total_size; //size in sectors of the device
uint32_t res; u32 res;
} mmcdevice; } mmcdevice;
void sdmmc_init(); void sdmmc_init();
int sdmmc_sdcard_readsector(uint32_t sector_no, uint8_t *out); int sdmmc_sdcard_readsector(u32 sector_no, u8 *out);
int sdmmc_sdcard_readsectors(uint32_t sector_no, uint32_t numsectors, uint8_t *out); int sdmmc_sdcard_readsectors(u32 sector_no, u32 numsectors, u8 *out);
int sdmmc_sdcard_writesector(uint32_t sector_no, const uint8_t *in); int sdmmc_sdcard_writesector(u32 sector_no, const u8 *in);
int sdmmc_sdcard_writesectors(uint32_t sector_no, uint32_t numsectors, const uint8_t *in); int sdmmc_sdcard_writesectors(u32 sector_no, u32 numsectors, const u8 *in);
int sdmmc_nand_readsectors(uint32_t sector_no, uint32_t numsectors, uint8_t *out); int sdmmc_nand_readsectors(u32 sector_no, u32 numsectors, u8 *out);
int sdmmc_nand_writesectors(uint32_t sector_no, uint32_t numsectors, const uint8_t *in); int sdmmc_nand_writesectors(u32 sector_no, u32 numsectors, const u8 *in);
int sdmmc_get_cid(bool isNand, uint32_t *info); int sdmmc_get_cid(bool isNand, u32 *info);
mmcdevice *getMMCDevice(int drive); mmcdevice *getMMCDevice(int drive);
@ -145,39 +145,39 @@ extern "C" {
#endif #endif
//--------------------------------------------------------------------------------- //---------------------------------------------------------------------------------
static inline uint16_t sdmmc_read16(uint16_t reg) { static inline u16 sdmmc_read16(u16 reg) {
//--------------------------------------------------------------------------------- //---------------------------------------------------------------------------------
return *(volatile uint16_t*)(SDMMC_BASE + reg); return *(volatile u16*)(SDMMC_BASE + reg);
} }
//--------------------------------------------------------------------------------- //---------------------------------------------------------------------------------
static inline void sdmmc_write16(uint16_t reg, uint16_t val) { static inline void sdmmc_write16(u16 reg, u16 val) {
//--------------------------------------------------------------------------------- //---------------------------------------------------------------------------------
*(volatile uint16_t*)(SDMMC_BASE + reg) = val; *(volatile u16*)(SDMMC_BASE + reg) = val;
} }
//--------------------------------------------------------------------------------- //---------------------------------------------------------------------------------
static inline uint32_t sdmmc_read32(uint16_t reg) { static inline u32 sdmmc_read32(u16 reg) {
//--------------------------------------------------------------------------------- //---------------------------------------------------------------------------------
return *(volatile uint32_t*)(SDMMC_BASE + reg); return *(volatile u32*)(SDMMC_BASE + reg);
} }
//--------------------------------------------------------------------------------- //---------------------------------------------------------------------------------
static inline void sdmmc_write32(uint16_t reg, uint32_t val) { static inline void sdmmc_write32(u16 reg, u32 val) {
//--------------------------------------------------------------------------------- //---------------------------------------------------------------------------------
*(volatile uint32_t*)(SDMMC_BASE + reg) = val; *(volatile u32*)(SDMMC_BASE + reg) = val;
} }
//--------------------------------------------------------------------------------- //---------------------------------------------------------------------------------
static inline void sdmmc_mask16(uint16_t reg, const uint16_t clear, const uint16_t set) { static inline void sdmmc_mask16(u16 reg, const u16 clear, const u16 set) {
//--------------------------------------------------------------------------------- //---------------------------------------------------------------------------------
uint16_t val = sdmmc_read16(reg); u16 val = sdmmc_read16(reg);
val &= ~clear; val &= ~clear;
val |= set; val |= set;
sdmmc_write16(reg, val); sdmmc_write16(reg, val);
} }
static inline void setckl(uint32_t data) static inline void setckl(u32 data)
{ {
sdmmc_write16(REG_SDCLKCTL, data & 0xFF); sdmmc_write16(REG_SDCLKCTL, data & 0xFF);
sdmmc_write16(REG_SDCLKCTL, 1u<<8 | (data & 0x2FF)); sdmmc_write16(REG_SDCLKCTL, 1u<<8 | (data & 0x2FF));