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Increased CTRCARD clock from 4.18 to 13.4 MHz on ROM reads. (#873)
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@ -27,7 +27,7 @@ void CTR_CmdReadData(u32 sector, u32 length, u32 blocks, void* buffer)
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(u32)((sector << 9) & 0xFFFFFFFF),
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0x00000000, 0x00000000
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};
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CTR_SendCommand(read_cmd, length, blocks, 0x704822C, buffer);
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CTR_SendCommand(read_cmd, length, blocks, 0x104822C, buffer); // Clock divider 5 (13.4 MHz). Same as Process9.
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}
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void CTR_CmdReadHeader(void* buffer)
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