mirror of
https://github.com/d0k3/GodMode9.git
synced 2025-06-26 13:42:47 +00:00
Allow running GodMode9 in any environment
This commit is contained in:
parent
d6490453ba
commit
15882e7111
4
Makefile
4
Makefile
@ -139,7 +139,8 @@ binary: common
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@$(MAKE) --no-print-directory -C $(BUILD) -f $(CURDIR)/Makefile
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@$(MAKE) --no-print-directory -C $(BUILD) -f $(CURDIR)/Makefile
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firm: binary screeninit
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firm: binary screeninit
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firmtool build $(OUTPUT).firm -D $(OUTPUT).elf $(OUTPUT_D)/screeninit.elf -C NDMA XDMA
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firmtool build $(OUTPUT).firm -n 0x08006000 -A 0x08006000 -D $(OUTPUT).bin $(OUTPUT_D)/screeninit.elf -C NDMA XDMA -S nand-retail
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firmtool build $(OUTPUT)_dev.firm -n 0x08006000 -A 0x08006000 -D $(OUTPUT).bin $(OUTPUT_D)/screeninit.elf -C NDMA XDMA -S nand-dev
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gateway: binary
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gateway: binary
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@cp resources/LauncherTemplate.dat $(OUTPUT_D)/Launcher.dat
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@cp resources/LauncherTemplate.dat $(OUTPUT_D)/Launcher.dat
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@ -172,6 +173,7 @@ release:
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#@[ -d $(RELEASE)/$(TARGET) ] || mkdir -p $(RELEASE)/$(TARGET)
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#@[ -d $(RELEASE)/$(TARGET) ] || mkdir -p $(RELEASE)/$(TARGET)
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@cp $(OUTPUT).bin $(RELEASE)
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@cp $(OUTPUT).bin $(RELEASE)
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@cp $(OUTPUT).firm $(RELEASE)
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@cp $(OUTPUT).firm $(RELEASE)
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#@cp $(OUTPUT)_dev.firm $(RELEASE)
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#@-cp $(OUTPUT).dat $(RELEASE)
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#@-cp $(OUTPUT).dat $(RELEASE)
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#@-cp $(OUTPUT).nds $(RELEASE)
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#@-cp $(OUTPUT).nds $(RELEASE)
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#@-cp $(OUTPUT).3dsx $(RELEASE)/$(TARGET)
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#@-cp $(OUTPUT).3dsx $(RELEASE)/$(TARGET)
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4
link.ld
4
link.ld
@ -5,6 +5,7 @@ ENTRY(_start)
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SECTIONS
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SECTIONS
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{
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{
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. = 0x23F00000;
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. = 0x23F00000;
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__start__ = ABSOLUTE(.);
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.text.start : ALIGN(4) { *(.text.start) }
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.text.start : ALIGN(4) { *(.text.start) }
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.text : ALIGN(4) { *(.text*) }
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.text : ALIGN(4) { *(.text*) }
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@ -15,4 +16,7 @@ SECTIONS
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. = ALIGN(4);
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. = ALIGN(4);
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__end__ = ABSOLUTE(.);
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__end__ = ABSOLUTE(.);
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__stack_top = __start__;
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__code_size__ = __end__ - __start__;
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}
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}
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@ -7,12 +7,13 @@
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#define PDN_GPU_CNT (*(vu8 *)0x10141200)
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#define PDN_GPU_CNT (*(vu8 *)0x10141200)
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#define ARESCREENSINITIALIZED (PDN_GPU_CNT != 1)
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#define ARESCREENSINITIALIZED (PDN_GPU_CNT != 1)
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#define BRIGHTNESS 0x39
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#define BRIGHTNESS (0xBF)
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void main(void)
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void main(void)
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{
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{
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char do_disco = !ARESCREENSINITIALIZED;
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vu32 *arm11Entry = (vu32 *)0x1FFFFFFC;
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vu32 *arm11Entry = (vu32 *)0x1FFFFFFC;
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if (ARESCREENSINITIALIZED) return; // nothing to do in that case
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u32 entry;
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*(vu32 *)0x10141200 = 0x1007F;
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*(vu32 *)0x10141200 = 0x1007F;
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*(vu32 *)0x10202014 = 0x00000001;
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*(vu32 *)0x10202014 = 0x00000001;
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@ -53,10 +54,6 @@ void main(void)
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*(vu32 *)0x10400490 = 0x000002D0;
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*(vu32 *)0x10400490 = 0x000002D0;
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*(vu32 *)0x1040049C = 0x00000000;
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*(vu32 *)0x1040049C = 0x00000000;
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//Disco register
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for(u32 i = 0; i < 256; i++)
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*(vu32 *)0x10400484 = 0x10101 * i;
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//Bottom screen
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//Bottom screen
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*(vu32 *)0x10400500 = 0x000001c2;
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*(vu32 *)0x10400500 = 0x000001c2;
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*(vu32 *)0x10400504 = 0x000000d1;
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*(vu32 *)0x10400504 = 0x000000d1;
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@ -80,16 +77,19 @@ void main(void)
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*(vu32 *)0x1040055C = 0x00f00140;
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*(vu32 *)0x1040055C = 0x00f00140;
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*(vu32 *)0x10400560 = 0x01c100d1;
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*(vu32 *)0x10400560 = 0x01c100d1;
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*(vu32 *)0x10400564 = 0x01920052;
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*(vu32 *)0x10400564 = 0x01920052;
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*(vu32 *)0x10400568 = 0x18300000 + 0x46500;
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*(vu32 *)0x10400568 = 0x18346500;
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*(vu32 *)0x10400570 = 0x80301;
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*(vu32 *)0x10400570 = 0x80301;
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*(vu32 *)0x10400574 = 0x00010501;
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*(vu32 *)0x10400574 = 0x00010501;
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*(vu32 *)0x10400578 = 0;
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*(vu32 *)0x10400578 = 0;
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*(vu32 *)0x10400590 = 0x000002D0;
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*(vu32 *)0x10400590 = 0x000002D0;
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*(vu32 *)0x1040059C = 0x00000000;
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*(vu32 *)0x1040059C = 0x00000000;
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//Disco register
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if (do_disco) {
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for(u32 i = 0; i < 256; i++)
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for(u32 i = 0; i < 256; i++) {
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*(vu32 *)0x10400484 = 0x10101 * i;
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*(vu32 *)0x10400584 = 0x10101 * i;
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*(vu32 *)0x10400584 = 0x10101 * i;
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}
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}
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//Set CakeBrah framebuffers
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//Set CakeBrah framebuffers
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fb->top_left = (u8 *)0x18300000;
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fb->top_left = (u8 *)0x18300000;
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@ -118,12 +118,10 @@ void main(void)
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while(!((REGs_PSC0[3] & 2) && (REGs_PSC1[3] & 2)));
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while(!((REGs_PSC0[3] & 2) && (REGs_PSC1[3] & 2)));
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//Clear ARM11 entrypoint
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// Clear ARM11 entrypoint
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*arm11Entry = 0;
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*arm11Entry = 0;
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//Wait for the entrypoint to be set
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//Wait for the entrypoint to be set, then branch to it
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while(!*arm11Entry);
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while((entry=*arm11Entry) == 0);
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((void (*)())(entry))();
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//Jump to it
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((void (*)())*arm11Entry)();
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}
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}
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@ -52,8 +52,8 @@
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#define COLOR_STD_BG COLOR_BLACK
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#define COLOR_STD_BG COLOR_BLACK
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#define COLOR_STD_FONT COLOR_WHITE
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#define COLOR_STD_FONT COLOR_WHITE
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#define TOP_SCREEN top_screen
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#define TOP_SCREEN ((u8*)(*(u32*)0x23FFFE00))
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#define BOT_SCREEN bottom_screen
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#define BOT_SCREEN ((u8*)(*(u32*)0x23FFFE08))
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#ifdef SWITCH_SCREENS
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#ifdef SWITCH_SCREENS
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#define MAIN_SCREEN TOP_SCREEN
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#define MAIN_SCREEN TOP_SCREEN
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@ -67,8 +67,6 @@
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#define SCREEN_WIDTH_ALT SCREEN_WIDTH_TOP
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#define SCREEN_WIDTH_ALT SCREEN_WIDTH_TOP
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#endif
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#endif
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extern u8 *top_screen, *bottom_screen;
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void ClearScreen(unsigned char *screen, int color);
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void ClearScreen(unsigned char *screen, int color);
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void ClearScreenF(bool clear_main, bool clear_alt, int color);
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void ClearScreenF(bool clear_main, bool clear_alt, int color);
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void DrawRectangle(u8* screen, int x, int y, int width, int height, int color);
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void DrawRectangle(u8* screen, int x, int y, int width, int height, int color);
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@ -1,28 +1,16 @@
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#include "common.h"
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#include "common.h"
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#include "godmode.h"
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#include "godmode.h"
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#include "ui.h"
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#include "i2c.h"
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#include "i2c.h"
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#include "power.h"
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#include "power.h"
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u8 *top_screen, *bottom_screen;
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void main(int argc, char** argv)
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void main(int argc, char** argv)
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{
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{
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(void) argc; // unused for now
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(void) argv; // unused for now
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// Turn on backlight
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// Turn on backlight
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I2C_writeReg(I2C_DEV_MCU, 0x22, 0x2A);
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I2C_writeReg(I2C_DEV_MCU, 0x22, 0x2A);
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// Fetch the framebuffer addresses
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if(argc >= 2) {
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// newer entrypoints
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u8 **fb = (u8 **)(void *)argv[1];
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top_screen = fb[0];
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bottom_screen = fb[2];
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} else {
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// outdated entrypoints
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top_screen = (u8*)(*(u32*)0x23FFFE00);
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bottom_screen = (u8*)(*(u32*)0x23FFFE08);
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}
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// Run the main program
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// Run the main program
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(GodMode() == GODMODE_EXIT_REBOOT) ? Reboot() : PowerOff();
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(GodMode() == GODMODE_EXIT_REBOOT) ? Reboot() : PowerOff();
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}
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}
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@ -145,9 +145,9 @@ bool InitNandCrypto(void)
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for(u32 i = 0; i < 16; i++) // little endian and reversed order
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for(u32 i = 0; i < 16; i++) // little endian and reversed order
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TwlNandCtr[i] = shasum[15-i];
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TwlNandCtr[i] = shasum[15-i];
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// part #2: TWL KEY
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// part #2: TWL KEY (if not already set up
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// see: https://www.3dbrew.org/wiki/Memory_layout#ARM9_ITCM
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// see: https://www.3dbrew.org/wiki/Memory_layout#ARM9_ITCM
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if (IS_A9LH && !IS_SIGHAX) { // only for a9lh
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if (GetNandPartitionInfo(NULL, NP_TYPE_FAT, NP_SUBTYPE_TWL, 0, NAND_SYSNAND) != 0) {
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u8 TwlKeyY[16] __attribute__((aligned(32)));
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u8 TwlKeyY[16] __attribute__((aligned(32)));
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// k9l already did the part of the init that required the OTP registers
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// k9l already did the part of the init that required the OTP registers
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@ -181,22 +181,27 @@ bool InitNandCrypto(void)
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use_aeskey(0x03);
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use_aeskey(0x03);
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}
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}
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// part #3: CTRNAND N3DS KEY / AGBSAVE CMAC KEY
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// part #3: CTRNAND N3DS KEY (if not set up)
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// thanks AuroraWright and Gelex for advice on this
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// thanks AuroraWright and Gelex for advice on this
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// see: https://github.com/AuroraWright/Luma3DS/blob/master/source/crypto.c#L347
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// see: https://github.com/AuroraWright/Luma3DS/blob/master/source/crypto.c#L347
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if (IS_A9LH && !IS_SIGHAX) { // only on A9LH, not required on sighax
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if (GetNandPartitionInfo(NULL, NP_TYPE_FAT, NP_SUBTYPE_CTR, 0, NAND_SYSNAND) != 0) {
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if (IS_A9LH && !IS_SIGHAX) { // only on A9LH
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// keyY 0x05 is encrypted @0x0EB014 in the FIRM90
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// keyY 0x05 is encrypted @0x0EB014 in the FIRM90
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// keyY 0x05 is encrypted @0x0EB24C in the FIRM81
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// keyY 0x05 is encrypted @0x0EB24C in the FIRM81
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if ((LoadKeyYFromP9(slot0x05KeyY, slot0x05KeyY_sha256, 0x0EB014, 0x05) != 0) &&
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if ((LoadKeyYFromP9(slot0x05KeyY, slot0x05KeyY_sha256, 0x0EB014, 0x05) != 0) &&
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(LoadKeyYFromP9(slot0x05KeyY, slot0x05KeyY_sha256, 0x0EB24C, 0x05) != 0))
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(LoadKeyYFromP9(slot0x05KeyY, slot0x05KeyY_sha256, 0x0EB24C, 0x05) != 0))
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LoadKeyFromFile(slot0x05KeyY, 0x05, 'Y', NULL);
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LoadKeyFromFile(slot0x05KeyY, 0x05, 'Y', NULL);
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} else LoadKeyFromFile(slot0x05KeyY, 0x05, 'Y', NULL);
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}
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// part #4: AGBSAVE CMAC KEY (source see above)
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if (IS_A9LH && !IS_SIGHAX) { // only on A9LH
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// keyY 0x24 is encrypted @0x0E62DC in the FIRM90
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// keyY 0x24 is encrypted @0x0E62DC in the FIRM90
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// keyY 0x24 is encrypted @0x0E6514 in the FIRM81
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// keyY 0x24 is encrypted @0x0E6514 in the FIRM81
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if ((LoadKeyYFromP9(NULL, slot0x24KeyY_sha256, 0x0E62DC, 0x24) != 0) &&
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if ((LoadKeyYFromP9(NULL, slot0x24KeyY_sha256, 0x0E62DC, 0x24) != 0) &&
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(LoadKeyYFromP9(NULL, slot0x24KeyY_sha256, 0x0E6514, 0x24) != 0))
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(LoadKeyYFromP9(NULL, slot0x24KeyY_sha256, 0x0E6514, 0x24) != 0))
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LoadKeyFromFile(NULL, 0x24, 'Y', NULL);
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LoadKeyFromFile(NULL, 0x24, 'Y', NULL);
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}
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} else LoadKeyFromFile(NULL, 0x24, 'Y', NULL);
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return true;
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return true;
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}
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}
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122
source/start.s
122
source/start.s
@ -1,86 +1,50 @@
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.section .text.start
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.section .text.start
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.global _start
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.align 4
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.align 4
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.arm
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.arm
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@ if the binary is booted from Brahma/CakeHax/k9lh
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@ make sure not to clobber r0-r2
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@ the entrypoint is <start + 0x0>
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.global _start
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@ framebuffers are already set
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_start:
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_start:
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nop
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@ Switch to supervisor mode and disable interrupts
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nop
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msr cpsr_c, #0xD3
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop @ dummy
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b _skip_gw
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@ if the binary is booted from the GW exploit
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@ Short delay (not always necessary, just in case)
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@ the entrypoint is <start + 0x30>
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mov r3, #0x40000
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_start_gw:
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.Lwaitloop:
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subs r3, #1
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bgt .Lwaitloop
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@@wait for the arm11 kernel threads to be ready
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@ Check the load address
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mov r1, #0x10000
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adr r3, _start
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waitLoop9:
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ldr r4, =__start__
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sub r1, #1
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cmp r3, r4
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cmp r1, #0
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beq _start_gm
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bgt waitLoop9
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mov r1, #0x10000
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@ Relocate the binary to the correct location and branch to it
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waitLoop92:
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ldr r5, =__code_size__
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sub r1, #1
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.Lbincopyloop:
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cmp r1, #0
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subs r5, #4
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bgt waitLoop92
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ldrge r6, [r3, r5]
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strge r6, [r4, r5]
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bge .Lbincopyloop
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mov r5, r0
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@ copy the payload to the standard entrypoint (0x23F00000)
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mov r6, r1
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adr r0, _start
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mov r7, r2
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add r1, r0, #0x100000
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ldr r3, =0xFFFF0830 @ Writeback & Invalidate DCache
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ldr r2, .entry
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.copy_binary_fcram:
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cmp r0, r1
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ldrlt r3, [r0], #4
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strlt r3, [r2], #4
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blt .copy_binary_fcram
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@ setup framebuffers to look like Brahma/etc
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ldr r0, .gw_fba
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ldr r1, [r0, #0x18]
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and r1, #1
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ldr r1, [r0, r1, lsl #2] @ r1 := top framebuffer loc
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mov r2, r1 @ r2 := top framebuffer loc
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ldr r0, .gw_fbb
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ldr r3, [r0, #0xC]
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and r3, #1
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ldr r3, [r0, r3, lsl #2] @ r3 := bottom framebuffer loc
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ldr r0, .cakehax
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stmia r0, {r1,r2,r3}
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@ framebuffers properly set
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ldr r3, =0xFFFF0830 @ flush (clean & invalidate) entire dcache b9 func
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blx r3
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blx r3
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mov r0, r5
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mov r1, r6
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mov r2, r7
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mov r3, #0
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mov lr, #0
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mcr p15, 0, r3, c7, c5, 0 @ invalidate I-cache
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mcr p15, 0, lr, c7, c5, 0 @ Invalidate ICache
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mov r2, #0
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bx r4
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ldr r3, .entry
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bx r3
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.gw_fba: .word 0x080FFFC0
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_start_gm:
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.gw_fbb: .word 0x080FFFD0
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ldr sp, =__stack_top
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.cakehax: .word 0x23FFFE00
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.entry: .word 0x23F00000
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_skip_gw:
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|
||||||
mov r9, r0 @ argc
|
mov r9, r0 @ argc
|
||||||
mov r10, r1 @ argv
|
mov r10, r1 @ argv
|
||||||
|
|
||||||
@ -102,11 +66,10 @@ _skip_gw:
|
|||||||
ldr r0, =__bss_start
|
ldr r0, =__bss_start
|
||||||
ldr r1, =__bss_end
|
ldr r1, =__bss_end
|
||||||
mov r2, #0
|
mov r2, #0
|
||||||
|
.Lbss_clr:
|
||||||
.bss_clr:
|
|
||||||
cmp r0, r1
|
cmp r0, r1
|
||||||
strlt r2, [r0], #4
|
strlt r2, [r0], #4
|
||||||
blt .bss_clr
|
blt .Lbss_clr
|
||||||
|
|
||||||
@ Invalidate caches
|
@ Invalidate caches
|
||||||
mov r5, #0
|
mov r5, #0
|
||||||
@ -121,14 +84,14 @@ _skip_gw:
|
|||||||
|
|
||||||
@ Sets MPU permissions and cache settings
|
@ Sets MPU permissions and cache settings
|
||||||
ldr r0, =0xFFFF001F @ ffff0000 64k | bootrom (unprotected / protected)
|
ldr r0, =0xFFFF001F @ ffff0000 64k | bootrom (unprotected / protected)
|
||||||
ldr r1, =0x3000801B @ 30000000 16k | dtcm
|
ldr r1, =0x3000801B @ 30008000 16k | dtcm
|
||||||
ldr r2, =0x01FF801D @ 01ff8000 32k | itcm
|
ldr r2, =0x01FF801D @ 01ff8000 32k | itcm
|
||||||
ldr r3, =0x08000029 @ 08000000 2M | arm9 mem (O3DS / N3DS)
|
ldr r3, =0x08000029 @ 08000000 2M | arm9 mem (O3DS / N3DS)
|
||||||
ldr r4, =0x10000029 @ 10000000 2M | io mem (ARM9 / first 2MB)
|
ldr r4, =0x10000029 @ 10000000 2M | io mem (ARM9 / first 2MB)
|
||||||
ldr r5, =0x20000037 @ 20000000 256M | fcram (O3DS / N3DS)
|
ldr r5, =0x20000037 @ 20000000 256M | fcram (O3DS / N3DS)
|
||||||
ldr r6, =0x1FF00027 @ 1FF00000 1M | dsp / axi wram
|
ldr r6, =0x1FF00027 @ 1FF00000 1M | dsp / axi wram
|
||||||
ldr r7, =0x1800002D @ 18000000 8M | vram (+ 2MB)
|
ldr r7, =0x1800002D @ 18000000 8M | vram (+ 2MB)
|
||||||
mov r8, #0x2D
|
mov r8, #0b00101101 @ bootrom/itcm/arm9 mem and fcram are cacheable/bufferable
|
||||||
mcr p15, 0, r0, c6, c0, 0
|
mcr p15, 0, r0, c6, c0, 0
|
||||||
mcr p15, 0, r1, c6, c1, 0
|
mcr p15, 0, r1, c6, c1, 0
|
||||||
mcr p15, 0, r2, c6, c2, 0
|
mcr p15, 0, r2, c6, c2, 0
|
||||||
@ -145,6 +108,13 @@ _skip_gw:
|
|||||||
ldr r1, =0x3000800A @ set dtcm
|
ldr r1, =0x3000800A @ set dtcm
|
||||||
mcr p15, 0, r1, c9, c1, 0 @ set the dtcm Region Register
|
mcr p15, 0, r1, c9, c1, 0 @ set the dtcm Region Register
|
||||||
|
|
||||||
|
@ Wait for screen init
|
||||||
|
mov r0, #0x20000000
|
||||||
|
.Lwaitforsi:
|
||||||
|
ldr r1, [r0, #-4]
|
||||||
|
cmp r1, #0
|
||||||
|
bne .Lwaitforsi
|
||||||
|
|
||||||
@ Enable caches
|
@ Enable caches
|
||||||
mrc p15, 0, r4, c1, c0, 0 @ read control register
|
mrc p15, 0, r4, c1, c0, 0 @ read control register
|
||||||
orr r4, r4, #(1<<18) @ - itcm enable
|
orr r4, r4, #(1<<18) @ - itcm enable
|
||||||
@ -159,10 +129,6 @@ _skip_gw:
|
|||||||
mov r1, #0x340
|
mov r1, #0x340
|
||||||
str r1, [r0]
|
str r1, [r0]
|
||||||
|
|
||||||
ldr sp, =0x23F00000
|
|
||||||
|
|
||||||
mov r0, r9
|
mov r0, r9
|
||||||
mov r1, r10
|
mov r1, r10
|
||||||
b main
|
b main
|
||||||
|
|
||||||
.pool
|
|
||||||
|
Loading…
x
Reference in New Issue
Block a user