Enable ITCM access for GW binary

This commit is contained in:
d0k3 2016-04-11 01:58:18 +02:00
parent e4d78826c9
commit ce4e454ad9

View File

@ -37,6 +37,14 @@ _start:
cmp r1, #0
bgt waitLoop92
@ Enable caches
mrc p15, 0, r4, c1, c0, 0 @ read control register
orr r4, r4, #(1<<18) @ - itcm enable
orr r4, r4, #(1<<12) @ - instruction cache enable
orr r4, r4, #(1<<2) @ - data cache enable
orr r4, r4, #(1<<0) @ - mpu enable
mcr p15, 0, r4, c1, c0, 0 @ write control register
ldr sp,=0x22160000
ldr r3, =main
blx r3