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https://github.com/d0k3/GodMode9.git
synced 2025-06-25 21:22:47 +00:00
simplify the sharedmem buffers
also made the wait on boot unconditional
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9ecb90a2ba
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@ -85,26 +85,24 @@ static void pxiRxHandler(u32 __attribute__((unused)) irqn)
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atomic_store(&pendingPxiRx, 1);
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}
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static void pxiRxUpdate(u32 *cmd, u32 *args)
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static u32 pxiRxUpdate(u32 *args)
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{
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u32 msg, lo, hi;
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*cmd = PXICMD_NONE;
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if (!atomic_exchange(&pendingPxiRx, 0))
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return;
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return PXICMD_NONE;
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msg = PXI_Recv();
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lo = msg & 0xFFFF;
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hi = msg >> 16;
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*cmd = lo;
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PXI_RecvArray(args, hi);
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return lo;
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}
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void __attribute__((noreturn)) MainLoop(void)
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{
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bool runCmdProcessor = true;
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bool runPxiCmdProcessor = true;
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#ifdef FIXED_BRIGHTNESS
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u8 fixed_bright_lvl = brightness_lvls[clamp(FIXED_BRIGHTNESS, 0, countof(brightness_lvls)-1)];
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@ -139,61 +137,70 @@ void __attribute__((noreturn)) MainLoop(void)
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// Process commands until the ARM9 tells
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// us it's time to boot something else
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// also handles Vblank events as needed
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// also handles VBlank events as needed
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do {
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u32 cmd, resp, args[PXI_MAX_ARGS];
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u32 pxiCmd, pxiReply, args[PXI_MAX_ARGS];
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vblankUpdate();
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pxiRxUpdate(&cmd, args);
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pxiCmd = pxiRxUpdate(args);
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switch(cmd) {
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switch(pxiCmd) {
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// ignore args and just wait until the next event
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case PXICMD_NONE:
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ARM_WFI();
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break;
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// revert to legacy boot mode
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case PXICMD_LEGACY_BOOT:
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runCmdProcessor = false;
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resp = 0;
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runPxiCmdProcessor = false;
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pxiReply = 0;
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break;
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// returns the shared memory address
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case PXICMD_GET_SHMEM_ADDRESS:
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resp = (u32)&sharedMem;
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pxiReply = (u32)&sharedMem;
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break;
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// takes in a single argument word and performs either an
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// I2C read or write depending on the value of the top bit
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case PXICMD_I2C_OP:
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{
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u32 devId, regAddr, size;
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devId = (args[0] & 0xff);
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regAddr = (args[0] >> 8) & 0xff;
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size = (args[0] >> 16) % I2C_SHARED_BUFSZ;
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regAddr = (args[0] >> 8) & 0xFF;
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size = (args[0] >> 16) % SHMEM_BUFFER_SIZE;
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if (args[0] & BIT(31)) {
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resp = I2C_writeRegBuf(devId, regAddr, sharedMem.i2cBuffer, size);
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pxiReply = I2C_writeRegBuf(devId, regAddr, sharedMem.dataBuffer.b, size);
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} else {
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resp = I2C_readRegBuf(devId, regAddr, sharedMem.i2cBuffer, size);
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pxiReply = I2C_readRegBuf(devId, regAddr, sharedMem.dataBuffer.b, size);
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}
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break;
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}
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// checks whether the NVRAM chip is online (not doing any work)
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case PXICMD_NVRAM_ONLINE:
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resp = (NVRAM_Status() & NVRAM_SR_WIP) == 0;
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pxiReply = (NVRAM_Status() & NVRAM_SR_WIP) == 0;
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break;
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// reads data from the NVRAM chip
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case PXICMD_NVRAM_READ:
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NVRAM_Read(args[0], (u32*)sharedMem.spiBuffer, args[1]);
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resp = 0;
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NVRAM_Read(args[0], sharedMem.dataBuffer.w, args[1]);
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pxiReply = 0;
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break;
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// sets the notification LED with the given color and period
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case PXICMD_SET_NOTIFY_LED:
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mcuSetStatusLED(args[0], args[1]);
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resp = 0;
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pxiReply = 0;
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break;
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// sets the LCDs brightness (if FIXED_BRIGHTNESS is disabled)
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case PXICMD_SET_BRIGHTNESS:
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{
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s32 newbrightness = (s32)args[0];
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resp = GFX_getBrightness();
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pxiReply = GFX_getBrightness();
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#ifndef FIXED_BRIGHTNESS
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if ((newbrightness > 0) && (newbrightness < 0x100)) {
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GFX_setBrightness(newbrightness, newbrightness);
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@ -206,14 +213,15 @@ void __attribute__((noreturn)) MainLoop(void)
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break;
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}
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// replies -1 on default
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default:
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resp = 0xFFFFFFFF;
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pxiReply = 0xFFFFFFFF;
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break;
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}
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if (cmd != PXICMD_NONE)
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PXI_Send(resp); // was a command sent from the ARM9, send a response
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} while(runCmdProcessor);
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if (pxiCmd != PXICMD_NONE)
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PXI_Send(pxiReply); // was a command sent from the ARM9, send a response
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} while(runPxiCmdProcessor);
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// perform deinit in reverse order
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gicDisableInterrupt(VBLANK_INTERRUPT);
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@ -107,9 +107,8 @@ void SYS_CoreZeroInit(void)
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mmuMapArea(0x20000000, 0x20000000, 128UL << 20, MMU_FLAGS(MMU_CACHE_WB, MMU_READ_WRITE, 1, 1));
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}
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if (SYS_IsNewConsole()) {
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TIMER_WaitMS(150);
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}
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// screen init magicks
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TIMER_WaitMS(64);
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// Initialize peripherals
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PXI_Reset();
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@ -8,29 +8,30 @@
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bool I2C_readRegBuf(I2cDevice devId, u8 regAddr, u8 *out, u32 size)
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{
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int ret;
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u8 *const dataBuffer = ARM_GetSHMEM()->dataBuffer.b;
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const u32 arg = devId | (regAddr << 8) | (size << 16);
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if (size >= I2C_SHARED_BUFSZ)
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if (size >= SHMEM_BUFFER_SIZE)
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return false;
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ret = PXI_DoCMD(PXICMD_I2C_OP, &arg, 1);
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ARM_InvDC_Range(dataBuffer, size);
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ARM_InvDC_Range(ARM_GetSHMEM()->i2cBuffer, size);
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memcpy(out, ARM_GetSHMEM()->i2cBuffer, size);
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memcpy(out, dataBuffer, size);
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return ret;
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}
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bool I2C_writeRegBuf(I2cDevice devId, u8 regAddr, const u8 *in, u32 size)
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{
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int ret;
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u8 *const dataBuffer = ARM_GetSHMEM()->dataBuffer.b;
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const u32 arg = devId | (regAddr << 8) | (size << 16) | BIT(31);
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if (size >= I2C_SHARED_BUFSZ)
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if (size >= SHMEM_BUFFER_SIZE)
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return false;
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ARM_InvDC_Range(ARM_GetSHMEM()->i2cBuffer, size);
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memcpy(ARM_GetSHMEM()->i2cBuffer, in, size);
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ARM_WbDC_Range(ARM_GetSHMEM()->i2cBuffer, size);
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memcpy(dataBuffer, in, size);
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ARM_WbDC_Range(dataBuffer, size);
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ARM_DSB();
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ret = PXI_DoCMD(PXICMD_I2C_OP, &arg, 1);
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@ -10,19 +10,20 @@ bool spiflash_get_status(void)
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bool spiflash_read(u32 offset, u32 size, u8 *buf)
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{
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u32 *const dataBuffer = ARM_GetSHMEM()->dataBuffer.w;
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u32 args[2];
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while(size > 0) {
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u32 blksz = min(size, SPI_SHARED_BUFSZ);
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u32 blksz = min(size, SHMEM_BUFFER_SIZE);
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args[0] = offset;
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args[1] = blksz;
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ARM_WbDC_Range(ARM_GetSHMEM()->spiBuffer, blksz);
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PXI_DoCMD(PXICMD_NVRAM_READ, args, 2);
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ARM_InvDC_Range(ARM_GetSHMEM()->spiBuffer, blksz);
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ARM_InvDC_Range(dataBuffer, blksz);
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ARM_DSB();
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memcpy(buf, ARM_GetSHMEM()->spiBuffer, blksz);
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memcpy(buf, dataBuffer, blksz);
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buf += blksz;
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size -= blksz;
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@ -20,8 +20,7 @@
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#include <arm.h>
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#define I2C_SHARED_BUFSZ 1024
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#define SPI_SHARED_BUFSZ 1024
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#define SHMEM_BUFFER_SIZE 2048
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typedef struct {
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union {
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@ -29,8 +28,12 @@ typedef struct {
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u64 full;
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} hidState;
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u8 i2cBuffer[I2C_SHARED_BUFSZ];
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u32 spiBuffer[SPI_SHARED_BUFSZ/4];
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union {
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uint8_t b[SHMEM_BUFFER_SIZE];
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uint16_t s[SHMEM_BUFFER_SIZE / 2];
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uint32_t w[SHMEM_BUFFER_SIZE / 4];
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uint64_t q[SHMEM_BUFFER_SIZE / 8];
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} dataBuffer;
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} __attribute__((packed, aligned(8))) SystemSHMEM;
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#ifdef ARM9
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