mirror of
https://github.com/d0k3/GodMode9.git
synced 2025-06-26 21:52:48 +00:00
8a4597635d
Sanitized I2C Reorganized the memory layout - Moved GM9 to ARM9 RAM - Increased RAMdisk size to 88MiB
117 lines
3.0 KiB
ArmAsm
117 lines
3.0 KiB
ArmAsm
.section .text.start
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.align 4
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.arm
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#include <arm.h>
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#include <brf.h>
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.global _start
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_start:
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@ Disable interrupts
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mrs r4, cpsr
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orr r4, r4, #(SR_IRQ | SR_FIQ)
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msr cpsr_c, r4
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@ Preserve boot registers
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mov r9, r0
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mov r10, r1
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mov r11, r2
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@ Clear bss
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ldr r0, =__bss_start
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ldr r1, =__bss_end
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mov r2, #0
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.LBSS_Clear:
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cmp r0, r1
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strlo r2, [r0], #4
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blo .LBSS_Clear
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ldr r0, =BRF_WB_INV_DCACHE
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blx r0 @ Writeback & Invalidate Data Cache
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ldr r0, =BRF_INVALIDATE_ICACHE
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blx r0 @ Invalidate Instruction Cache
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@ Disable caches / DTCM / MPU
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ldr r1, =(CR_ENABLE_MPU | CR_ENABLE_DCACHE | CR_ENABLE_ICACHE | \
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CR_ENABLE_DTCM)
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ldr r2, =(CR_ENABLE_ITCM)
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mrc p15, 0, r0, c1, c0, 0
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bic r0, r1
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orr r0, r2
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mcr p15, 0, r0, c1, c0, 0
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@ Give full access to defined memory regions
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ldr r0, =0x33333333
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mcr p15, 0, r0, c5, c0, 2 @ write data access
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mcr p15, 0, r0, c5, c0, 3 @ write instruction access
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@ Set MPU regions and cache settings
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adr r0, __mpu_regions
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ldmia r0, {r1-r8}
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mov r0, #0b00101000
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mcr p15, 0, r1, c6, c0, 0
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mcr p15, 0, r2, c6, c1, 0
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mcr p15, 0, r3, c6, c2, 0
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mcr p15, 0, r4, c6, c3, 0
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mcr p15, 0, r5, c6, c4, 0
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mcr p15, 0, r6, c6, c5, 0
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mcr p15, 0, r7, c6, c6, 0
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mcr p15, 0, r8, c6, c7, 0
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mcr p15, 0, r0, c3, c0, 0 @ Write bufferable
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mcr p15, 0, r0, c2, c0, 0 @ Data cacheable
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mcr p15, 0, r0, c2, c0, 1 @ Inst cacheable
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@ Enable dctm
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ldr r0, =0x3000800A
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mcr p15, 0, r0, c9, c1, 0 @ set the DTCM Region Register
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@ Enable caches / select low exception vectors
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ldr r1, =(CR_ALT_VECTORS | CR_DISABLE_TBIT)
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ldr r2, =(CR_ENABLE_MPU | CR_ENABLE_DCACHE | CR_ENABLE_ICACHE | \
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CR_ENABLE_DTCM | CR_CACHE_RROBIN)
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mrc p15, 0, r0, c1, c0, 0
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bic r0, r1
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orr r0, r2
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mcr p15, 0, r0, c1, c0, 0
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@ Install exception handlers
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ldr r0, =XRQ_Start
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ldr r1, =XRQ_End
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ldr r2, =0x00000000
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.LXRQ_Install:
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cmp r0, r1
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ldrlo r3, [r0], #4
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strlo r3, [r2], #4
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blo .LXRQ_Install
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@ Fix SDMC mounting
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mov r0, #0x10000000
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mov r1, #0x340
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str r1, [r0, #0x20]
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@ Check arguments
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lsl r2, r11, #16
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lsr r2, r2, #16
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ldr r3, =0xBEEF
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cmp r2, r3
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moveq r0, r9
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moveq r1, r10
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movne r0, #0
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@ Switch to system mode, disable interrupts, setup application stack
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msr cpsr_c, #(SR_SYS_MODE | SR_IRQ | SR_FIQ)
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ldr sp, =__stack_top
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b main
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__mpu_regions:
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.word 0xFFFF001F @ FFFF0000 64k | bootrom (unprotected / protected)
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.word 0x3000801B @ 30008000 16k | dtcm
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.word 0x00000035 @ 00000000 128M | itcm
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.word 0x08000029 @ 08000000 2M | arm9 mem (O3DS / N3DS)
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.word 0x10000029 @ 10000000 2M | io mem (ARM9 / first 2MB)
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.word 0x20000037 @ 20000000 256M | fcram (O3DS / N3DS)
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.word 0x1FF00027 @ 1FF00000 1M | dsp / axi wram
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.word 0x1800002D @ 18000000 8M | vram (+ 2MB)
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