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47 lines
1.1 KiB
ArmAsm
47 lines
1.1 KiB
ArmAsm
.section .text
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.arm
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#include <arm.h>
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#define MPCORE_PMR (0x17E00000)
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#define IRQ_SPURIOUS (1023)
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#define IRQ_COUNT (128)
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.global main_irq_handler
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.type main_irq_handler, %function
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main_irq_handler:
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sub lr, lr, #4 @ Fix return address
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srsfd sp!, #SR_SVC_MODE @ Store IRQ mode LR and SPSR on the SVC stack
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cps #SR_SVC_MODE @ Switch to SVC mode
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push {r0-r3, r12, lr} @ Preserve registers
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1:
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ldr lr, =MPCORE_PMR
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ldr r0, [lr, #0x10C] @ Get pending interrupt
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ldr r1, =IRQ_SPURIOUS
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cmp r0, r1
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beq 3f @ Spurious interrupt, no interrupts pending
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cmp r0, #IRQ_COUNT
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bhs 2f @ Invalid interrupt ID
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ldr r12, =GIC_Handlers
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ldr r12, [r12, r0, lsl #2]
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cmp r12, #0
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beq 2f
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push {r0, r12}
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blx r12
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pop {r0, r12}
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2:
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ldr lr, =MPCORE_PMR
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str r0, [lr, #0x110] @ End of interrupt
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b 1b @ Check for any other pending interrupts
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3:
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pop {r0-r3, r12, lr} @ Restore registers
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rfeia sp! @ Return From Exception
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