mirror of
https://github.com/Atmosphere-NX/Atmosphere.git
synced 2026-06-25 05:05:52 +00:00
pinmux: use the actual option definitions instead of magic numbers
This commit is contained in:
parent
556e628478
commit
7b6ee4916e
@ -104,25 +104,25 @@ namespace ams::pinmux::driver::board::nintendo::nx {
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#if defined(AMS_PINMUX_CONFIG_RIGHT_RAIL_AS_UART)
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#if defined(AMS_PINMUX_CONFIG_RIGHT_RAIL_AS_UART)
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UpdateSinglePinmuxPad({
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UpdateSinglePinmuxPad({
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.index = PinmuxPadIndex_Uart2Tx,
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.index = PinmuxPadIndex_Uart2Tx,
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.option = 0, /* PinmuxPadPm_Pm0 | PinmuxOpt_NoPupd | PinmuxOpt_Output */
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.option = (u32)PinmuxPadPm_Pm0 | PinmuxOpt_NoPupd | PinmuxOpt_Output,
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.option_mask = (0x7|0x18|0x60), /* PinmuxOptBitMask_Pm | PinmuxOptBitMask_Pupd | PinmuxOptBitMask_Dir */
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.option_mask = (u32)PinmuxOptBitMask_Pm | PinmuxOptBitMask_Pupd | PinmuxOptBitMask_Dir,
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});
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});
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UpdateSinglePinmuxPad({
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UpdateSinglePinmuxPad({
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.index = PinmuxPadIndex_Uart2Cts,
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.index = PinmuxPadIndex_Uart2Cts,
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.option = 0x20, /* PinmuxPadPm_Pm0 | PinmuxOpt_NoPupd | PinmuxOpt_Input */
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.option = (u32)PinmuxPadPm_Pm0 | PinmuxOpt_NoPupd | PinmuxOpt_Input,
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.option_mask = (0x7|0x18|0x60), /* PinmuxOptBitMask_Pm | PinmuxOptBitMask_Pupd | PinmuxOptBitMask_Dir */
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.option_mask = (u32)PinmuxOptBitMask_Pm | PinmuxOptBitMask_Pupd | PinmuxOptBitMask_Dir,
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});
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});
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#endif
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#endif
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#if defined(AMS_PINMUX_CONFIG_LEFT_RAIL_AS_UART)
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#if defined(AMS_PINMUX_CONFIG_LEFT_RAIL_AS_UART)
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UpdateSinglePinmuxPad({
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UpdateSinglePinmuxPad({
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.index = PinmuxPadIndex_Uart3Tx,
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.index = PinmuxPadIndex_Uart3Tx,
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.option = 0, /* PinmuxPadPm_Pm0 | PinmuxOpt_NoPupd | PinmuxOpt_Output */
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.option = (u32)PinmuxPadPm_Pm0 | PinmuxOpt_NoPupd | PinmuxOpt_Output,
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.option_mask = (0x7|0x18|0x60), /* PinmuxOptBitMask_Pm | PinmuxOptBitMask_Pupd | PinmuxOptBitMask_Dir */
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.option_mask = (u32)PinmuxOptBitMask_Pm | PinmuxOptBitMask_Pupd | PinmuxOptBitMask_Dir,
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});
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});
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UpdateSinglePinmuxPad({
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UpdateSinglePinmuxPad({
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.index = PinmuxPadIndex_Uart3Cts,
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.index = PinmuxPadIndex_Uart3Cts,
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.option = 0x20, /* PinmuxPadPm_Pm0 | PinmuxOpt_NoPupd | PinmuxOpt_Input */
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.option = (u32)PinmuxPadPm_Pm0 | PinmuxOpt_NoPupd | PinmuxOpt_Input,
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.option_mask = (0x7|0x18|0x60), /* PinmuxOptBitMask_Pm | PinmuxOptBitMask_Pupd | PinmuxOptBitMask_Dir */
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.option_mask = (u32)PinmuxOptBitMask_Pm | PinmuxOptBitMask_Pupd | PinmuxOptBitMask_Dir,
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});
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});
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#endif
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#endif
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}
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}
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@ -24,170 +24,6 @@ namespace ams::pinmux::driver::board::nintendo::nx {
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uintptr_t g_apb_misc_virtual_address = dd::QueryIoMapping(0x70000000, 0x4000);
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uintptr_t g_apb_misc_virtual_address = dd::QueryIoMapping(0x70000000, 0x4000);
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enum PinmuxPadMask : u32 {
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PinmuxPadMask_Pm = 0x3,
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PinmuxPadMask_Pupd = 0xC,
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PinmuxPadMask_Tristate = 0x10,
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PinmuxPadMask_Park = 0x20,
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PinmuxPadMask_EInput = 0x40,
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PinmuxPadMask_Lock = 0x80,
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PinmuxPadMask_ELpdr = 0x100,
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PinmuxPadMask_EHsm = 0x200,
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PinmuxPadMask_EIoHv = 0x400,
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PinmuxPadMask_EOd = 0x800,
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PinmuxPadMask_ESchmt = 0x1000,
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PinmuxPadMask_DrvType = 0x6000,
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PinmuxPadMask_Preemp = 0x8000,
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PinmuxPadMask_IoReset = 0x10000,
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};
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enum PinmuxPadBitOffset : u32 {
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PinmuxPadBitOffset_Pm = 0x0,
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PinmuxPadBitOffset_Pupd = 0x2,
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PinmuxPadBitOffset_Tristate = 0x4,
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PinmuxPadBitOffset_Park = 0x5,
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PinmuxPadBitOffset_EInput = 0x6,
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PinmuxPadBitOffset_Lock = 0x7,
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PinmuxPadBitOffset_ELpdr = 0x8,
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PinmuxPadBitOffset_EHsm = 0x9,
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PinmuxPadBitOffset_EIoHv = 0xA,
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PinmuxPadBitOffset_EOd = 0xB,
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PinmuxPadBitOffset_ESchmt = 0xC,
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PinmuxPadBitOffset_DrvType = 0xD,
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PinmuxPadBitOffset_Preemp = 0xF,
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PinmuxPadBitOffset_IoReset = 0x10,
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};
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enum PinmuxOptBitMask : u32 {
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PinmuxOptBitMask_Pm = 0x7,
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PinmuxOptBitMask_Pupd = 0x18,
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PinmuxOptBitMask_Dir = 0x60,
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PinmuxOptBitMask_Lock = 0x80,
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PinmuxOptBitMask_IoReset = 0x100,
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PinmuxOptBitMask_IoHv = 0x200,
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PinmuxOptBitMask_Park = 0x400,
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PinmuxOptBitMask_Lpdr = 0x800,
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PinmuxOptBitMask_Hsm = 0x1000,
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PinmuxOptBitMask_Schmt = 0x2000,
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PinmuxOptBitMask_DrvType = 0xC000,
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PinmuxOptBitMask_Preemp = 0x10000,
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};
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enum PinmuxOptBitOffset {
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PinmuxOptBitOffset_Pm = 0x0,
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PinmuxOptBitOffset_Pupd = 0x3,
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PinmuxOptBitOffset_Dir = 0x5,
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PinmuxOptBitOffset_Lock = 0x7,
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PinmuxOptBitOffset_IoReset = 0x8,
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PinmuxOptBitOffset_IoHv = 0x9,
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PinmuxOptBitOffset_Park = 0xA,
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PinmuxOptBitOffset_Lpdr = 0xB,
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PinmuxOptBitOffset_Hsm = 0xC,
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PinmuxOptBitOffset_Schmt = 0xD,
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PinmuxOptBitOffset_DrvType = 0xE,
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PinmuxOptBitOffset_Preemp = 0x10,
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};
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enum PinmuxDrivePadMask : u32{
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PinmuxDrivePadMask_DrvDn = 0x0001F000,
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PinmuxDrivePadMask_DrvUp = 0x01F00000,
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PinmuxDrivePadMask_CzDrvDn = 0x0007F000,
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PinmuxDrivePadMask_CzDrvUp = 0x07F00000,
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PinmuxDrivePadMask_SlwR = 0x30000000,
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PinmuxDrivePadMask_SlwF = 0xC0000000,
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};
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enum PinmuxDrivePadBitOffset : u32 {
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PinmuxDrivePadBitOffset_DrvDn = 12,
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PinmuxDrivePadBitOffset_DrvUp = 20,
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PinmuxDrivePadBitOffset_CzDrvDn = 12,
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PinmuxDrivePadBitOffset_CzDrvUp = 20,
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PinmuxDrivePadBitOffset_SlwR = 28,
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PinmuxDrivePadBitOffset_SlwF = 30,
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};
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enum PinmuxDriveOptBitMask : u32 {
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PinmuxDriveOptBitMask_DrvDn = 0x0001F000,
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PinmuxDriveOptBitMask_DrvUp = 0x01F00000,
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PinmuxDriveOptBitMask_CzDrvDn = 0x0007F000,
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PinmuxDriveOptBitMask_CzDrvUp = 0x07F00000,
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PinmuxDriveOptBitMask_SlwR = 0x30000000,
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PinmuxDriveOptBitMask_SlwF = 0xC0000000,
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};
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enum PinmuxDriveOptBitOffset : u32 {
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PinmuxDriveOptBitOffset_DrvDn = 12,
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PinmuxDriveOptBitOffset_DrvUp = 20,
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PinmuxDriveOptBitOffset_CzDrvDn = 12,
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PinmuxDriveOptBitOffset_CzDrvUp = 20,
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PinmuxDriveOptBitOffset_SlwR = 28,
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PinmuxDriveOptBitOffset_SlwF = 30,
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};
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enum PinmuxOpt : u32 {
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/* Pm */
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PinmuxOpt_Gpio = 0x4,
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PinmuxOpt_Unused = 0x5,
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/* Pupd */
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PinmuxOpt_NoPupd = 0x0,
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PinmuxOpt_PullDown = 0x8,
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PinmuxOpt_PullUp = 0x10,
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/* Dir */
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PinmuxOpt_Output = 0x0,
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PinmuxOpt_Input = 0x20,
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PinmuxOpt_Bidirection = 0x40,
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PinmuxOpt_OpenDrain = 0x60,
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/* Lock */
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PinmuxOpt_Unlock = 0x0,
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PinmuxOpt_Lock = 0x80,
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/* IoReset */
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PinmuxOpt_DisableIoReset = 0x0,
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PinmuxOpt_EnableIoReset = 0x100,
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/* IoHv */
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PinmuxOpt_NormalVoltage = 0x0,
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PinmuxOpt_HighVoltage = 0x200,
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/* Park */
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PinmuxOpt_ResetOnLowPower = 0x0,
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PinmuxOpt_ParkOnLowPower = 0x400,
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/* Lpdr */
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PinmuxOpt_DisableBaseDriver = 0x0,
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PinmuxOpt_EnableBaseDriver = 0x800,
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/* Hsm */
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PinmuxOpt_DisableHighSpeedMode = 0x0,
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PinmuxOpt_EnableHighSpeedMode = 0x1000,
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/* Schmt */
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PinmuxOpt_CmosMode = 0x0,
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PinmuxOpt_SchmittTrigger = 0x2000,
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/* DrvType */
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PinmuxOpt_DrvType1X = 0x0,
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PinmuxOpt_DrvType2X = 0x4000,
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PinmuxOpt_DrvType3X = 0x8000,
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PinmuxOpt_DrvType4X = 0xC000,
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/* Preemp */
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PinmuxOpt_DisablePreemp = 0x0,
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PinmuxOpt_EnablePreemp = 0x10000,
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};
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enum PinmuxPadPm : u32 {
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PinmuxPadPm_Default = 0xFFFFFFFF,
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PinmuxPadPm_Pm0 = 0x0,
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PinmuxPadPm_Pm1 = 0x1,
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PinmuxPadPm_Pm2 = 0x2,
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PinmuxPadPm_Pm3 = 0x3,
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PinmuxPadPm_Safe = 0x4,
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};
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struct PinmuxPadCharacter {
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struct PinmuxPadCharacter {
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u32 reg_offset;
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u32 reg_offset;
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u32 reg_mask;
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u32 reg_mask;
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@ -30,6 +30,170 @@ namespace ams::pinmux::driver::board::nintendo::nx {
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u32 option_mask;
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u32 option_mask;
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};
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};
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enum PinmuxPadMask : u32 {
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PinmuxPadMask_Pm = 0x3,
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PinmuxPadMask_Pupd = 0xC,
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PinmuxPadMask_Tristate = 0x10,
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PinmuxPadMask_Park = 0x20,
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PinmuxPadMask_EInput = 0x40,
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PinmuxPadMask_Lock = 0x80,
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PinmuxPadMask_ELpdr = 0x100,
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PinmuxPadMask_EHsm = 0x200,
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PinmuxPadMask_EIoHv = 0x400,
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PinmuxPadMask_EOd = 0x800,
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PinmuxPadMask_ESchmt = 0x1000,
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PinmuxPadMask_DrvType = 0x6000,
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PinmuxPadMask_Preemp = 0x8000,
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PinmuxPadMask_IoReset = 0x10000,
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};
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enum PinmuxPadBitOffset : u32 {
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PinmuxPadBitOffset_Pm = 0x0,
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PinmuxPadBitOffset_Pupd = 0x2,
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PinmuxPadBitOffset_Tristate = 0x4,
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PinmuxPadBitOffset_Park = 0x5,
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PinmuxPadBitOffset_EInput = 0x6,
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PinmuxPadBitOffset_Lock = 0x7,
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PinmuxPadBitOffset_ELpdr = 0x8,
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PinmuxPadBitOffset_EHsm = 0x9,
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PinmuxPadBitOffset_EIoHv = 0xA,
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PinmuxPadBitOffset_EOd = 0xB,
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PinmuxPadBitOffset_ESchmt = 0xC,
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PinmuxPadBitOffset_DrvType = 0xD,
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PinmuxPadBitOffset_Preemp = 0xF,
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PinmuxPadBitOffset_IoReset = 0x10,
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};
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enum PinmuxOptBitMask : u32 {
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PinmuxOptBitMask_Pm = 0x7,
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PinmuxOptBitMask_Pupd = 0x18,
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PinmuxOptBitMask_Dir = 0x60,
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PinmuxOptBitMask_Lock = 0x80,
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PinmuxOptBitMask_IoReset = 0x100,
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PinmuxOptBitMask_IoHv = 0x200,
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PinmuxOptBitMask_Park = 0x400,
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PinmuxOptBitMask_Lpdr = 0x800,
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PinmuxOptBitMask_Hsm = 0x1000,
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PinmuxOptBitMask_Schmt = 0x2000,
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PinmuxOptBitMask_DrvType = 0xC000,
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PinmuxOptBitMask_Preemp = 0x10000,
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};
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enum PinmuxOptBitOffset {
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PinmuxOptBitOffset_Pm = 0x0,
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PinmuxOptBitOffset_Pupd = 0x3,
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PinmuxOptBitOffset_Dir = 0x5,
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PinmuxOptBitOffset_Lock = 0x7,
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PinmuxOptBitOffset_IoReset = 0x8,
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PinmuxOptBitOffset_IoHv = 0x9,
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PinmuxOptBitOffset_Park = 0xA,
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PinmuxOptBitOffset_Lpdr = 0xB,
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PinmuxOptBitOffset_Hsm = 0xC,
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PinmuxOptBitOffset_Schmt = 0xD,
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PinmuxOptBitOffset_DrvType = 0xE,
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PinmuxOptBitOffset_Preemp = 0x10,
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};
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enum PinmuxDrivePadMask : u32 {
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PinmuxDrivePadMask_DrvDn = 0x0001F000,
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PinmuxDrivePadMask_DrvUp = 0x01F00000,
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PinmuxDrivePadMask_CzDrvDn = 0x0007F000,
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PinmuxDrivePadMask_CzDrvUp = 0x07F00000,
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PinmuxDrivePadMask_SlwR = 0x30000000,
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PinmuxDrivePadMask_SlwF = 0xC0000000,
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};
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enum PinmuxDrivePadBitOffset : u32 {
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PinmuxDrivePadBitOffset_DrvDn = 12,
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PinmuxDrivePadBitOffset_DrvUp = 20,
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PinmuxDrivePadBitOffset_CzDrvDn = 12,
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PinmuxDrivePadBitOffset_CzDrvUp = 20,
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PinmuxDrivePadBitOffset_SlwR = 28,
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PinmuxDrivePadBitOffset_SlwF = 30,
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};
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enum PinmuxDriveOptBitMask : u32 {
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PinmuxDriveOptBitMask_DrvDn = 0x0001F000,
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PinmuxDriveOptBitMask_DrvUp = 0x01F00000,
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PinmuxDriveOptBitMask_CzDrvDn = 0x0007F000,
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PinmuxDriveOptBitMask_CzDrvUp = 0x07F00000,
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PinmuxDriveOptBitMask_SlwR = 0x30000000,
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PinmuxDriveOptBitMask_SlwF = 0xC0000000,
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};
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enum PinmuxDriveOptBitOffset : u32 {
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PinmuxDriveOptBitOffset_DrvDn = 12,
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PinmuxDriveOptBitOffset_DrvUp = 20,
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PinmuxDriveOptBitOffset_CzDrvDn = 12,
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PinmuxDriveOptBitOffset_CzDrvUp = 20,
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PinmuxDriveOptBitOffset_SlwR = 28,
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PinmuxDriveOptBitOffset_SlwF = 30,
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};
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enum PinmuxOpt : u32 {
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/* Pm */
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PinmuxOpt_Gpio = 0x4,
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PinmuxOpt_Unused = 0x5,
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/* Pupd */
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PinmuxOpt_NoPupd = 0x0,
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PinmuxOpt_PullDown = 0x8,
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PinmuxOpt_PullUp = 0x10,
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/* Dir */
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PinmuxOpt_Output = 0x0,
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PinmuxOpt_Input = 0x20,
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PinmuxOpt_Bidirection = 0x40,
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PinmuxOpt_OpenDrain = 0x60,
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/* Lock */
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PinmuxOpt_Unlock = 0x0,
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PinmuxOpt_Lock = 0x80,
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|
/* IoReset */
|
||||||
|
PinmuxOpt_DisableIoReset = 0x0,
|
||||||
|
PinmuxOpt_EnableIoReset = 0x100,
|
||||||
|
|
||||||
|
/* IoHv */
|
||||||
|
PinmuxOpt_NormalVoltage = 0x0,
|
||||||
|
PinmuxOpt_HighVoltage = 0x200,
|
||||||
|
|
||||||
|
/* Park */
|
||||||
|
PinmuxOpt_ResetOnLowPower = 0x0,
|
||||||
|
PinmuxOpt_ParkOnLowPower = 0x400,
|
||||||
|
|
||||||
|
/* Lpdr */
|
||||||
|
PinmuxOpt_DisableBaseDriver = 0x0,
|
||||||
|
PinmuxOpt_EnableBaseDriver = 0x800,
|
||||||
|
|
||||||
|
/* Hsm */
|
||||||
|
PinmuxOpt_DisableHighSpeedMode = 0x0,
|
||||||
|
PinmuxOpt_EnableHighSpeedMode = 0x1000,
|
||||||
|
|
||||||
|
/* Schmt */
|
||||||
|
PinmuxOpt_CmosMode = 0x0,
|
||||||
|
PinmuxOpt_SchmittTrigger = 0x2000,
|
||||||
|
|
||||||
|
/* DrvType */
|
||||||
|
PinmuxOpt_DrvType1X = 0x0,
|
||||||
|
PinmuxOpt_DrvType2X = 0x4000,
|
||||||
|
PinmuxOpt_DrvType3X = 0x8000,
|
||||||
|
PinmuxOpt_DrvType4X = 0xC000,
|
||||||
|
|
||||||
|
/* Preemp */
|
||||||
|
PinmuxOpt_DisablePreemp = 0x0,
|
||||||
|
PinmuxOpt_EnablePreemp = 0x10000,
|
||||||
|
};
|
||||||
|
|
||||||
|
enum PinmuxPadPm : u32 {
|
||||||
|
PinmuxPadPm_Default = 0xFFFFFFFF,
|
||||||
|
PinmuxPadPm_Pm0 = 0x0,
|
||||||
|
PinmuxPadPm_Pm1 = 0x1,
|
||||||
|
PinmuxPadPm_Pm2 = 0x2,
|
||||||
|
PinmuxPadPm_Pm3 = 0x3,
|
||||||
|
PinmuxPadPm_Safe = 0x4,
|
||||||
|
};
|
||||||
|
|
||||||
void InitializePlatformPads();
|
void InitializePlatformPads();
|
||||||
|
|
||||||
void UpdateSinglePinmuxPad(const PinmuxPadConfig &config);
|
void UpdateSinglePinmuxPad(const PinmuxPadConfig &config);
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user