Properly configure pull up and pull down offsets for autocal.
Run autocal prior to every transfer.
Prevent race conditions in sdmmc_wait_for_event() - make sure the fault
handler has highest priority, then the target irq, state conditions and
finally the error mask.
Do not clear all bits (|=) when acknowledging fault conditions,
only acknowledge the fault conditions itself.
Enable interrupts before preparing command registers - if sdmmc is fast
enough it can actually finish transfer before we enabled the interrupts.
Enabling interrupts clears the COMMAND COMPLETE status bit.
Temporarily print all the sdmmc messages in stage2 - for yet unknown
reason respecting the log level results in some failures.
This results in working microsd card in stage2 on my switch with Samsung
EVO+ 256GB microsd card.
Sleep for 1 us, not 1 ms.
Timeout after 10 ms, set driver strength code values according to TRM.
Fix typo (mS) - time is in milliseconds, not milliSiemens.
According to Tegra X1 Series Processors Silicon Errata there is possible
misalignment of received data which results in a CRC error. The issue is
present only in SDR50 mode.
