mirror of
https://github.com/Atmosphere-NX/Atmosphere.git
synced 2026-03-05 07:04:40 +00:00
182 lines
6.7 KiB
C++
182 lines
6.7 KiB
C++
/*
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* Copyright (c) 2019-2020 Atmosphère-NX
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "hvisor_exception_dispatcher.hpp"
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#include "hvisor_irq_manager.hpp"
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#include "hvisor_fpu_register_cache.hpp"
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#include "hvisor_guest_timers.hpp"
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#include "traps/hvisor_traps_data_abort.hpp"
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#include "traps/hvisor_traps_hvc.hpp"
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#include "traps/hvisor_traps_single_step.hpp"
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#include "traps/hvisor_traps_smc.hpp"
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#include "traps/hvisor_traps_sysreg.hpp"
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#include "debug_manager.h"
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namespace ams::hvisor {
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void EnableGeneralTraps(void)
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{
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u64 hcr = THERMOSPHERE_GET_SYSREG(hcr_el2);
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// Trap SMC instructions
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hcr |= cpu::HCR_TSC;
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// Trap set/way isns
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hcr |= cpu::HCR_TSW;
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// Reroute physical IRQs to EL2
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hcr |= cpu::HCR_IMO;
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// Make sure HVC is enabled
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hcr &= ~cpu::HCR_HCD;
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THERMOSPHERE_SET_SYSREG(hcr_el2, hcr);
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EnableGuestTimerTraps();
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}
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void DumpStackFrame(ExceptionStackFrame *frame, bool sameEl)
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{
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#ifndef NDEBUG
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uintptr_t stackTop = memoryMapGetStackTop(currentCoreCtx->GetCoreId());
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for (u32 i = 0; i < 30; i += 2) {
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DEBUG("x%u\t\t%016llx\t\tx%u\t\t%016llx\n", i, frame->x[i], i + 1, frame->x[i + 1]);
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}
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DEBUG("x30\t\t%016llx\n\n", frame->x[30]);
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DEBUG("elr_el2\t\t%016llx\n", frame->elr_el2);
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DEBUG("spsr_el2\t%016llx\n", frame->spsr_el2);
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DEBUG("far_el2\t\t%016llx\n", frame->far_el2);
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if (sameEl) {
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DEBUG("sp_el2\t\t%016llx\n", frame->sp_el2);
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} else {
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DEBUG("sp_el1\t\t%016llx\n", frame->sp_el1);
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}
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DEBUG("sp_el0\t\t%016llx\n", frame->sp_el0);
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DEBUG("cntpct_el0\t%016llx\n", frame->cntpct_el0);
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if (frame == currentCoreCtx->GetGuestFrame()) {
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DEBUG("cntp_ctl_el0\t%016llx\n", frame->cntp_ctl_el0);
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DEBUG("cntv_ctl_el0\t%016llx\n", frame->cntv_ctl_el0);
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} else if ((frame->sp_el2 & ~0xFFFul) + 0x1000 == stackTop) {
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// Try to dump the stack (comment if this crashes)
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u64 *sp = reinterpret_cast<u64 *>(frame->sp_el2);
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u64 *spEnd = sp + 0x20;
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u64 *spMax = reinterpret_cast<u64 *>((frame->sp_el2 + 0xFFF) & ~0xFFFul);
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DEBUG("Stack trace:\n");
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while (sp < spEnd && sp < spMax) {
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DEBUG("\t%016lx\n", *sp++);
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}
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} else {
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DEBUG("Stack overflow/double fault detected!\n");
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}
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#else
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(void)frame;
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(void)sameEl;
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#endif
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}
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void ExceptionEntryPostprocess(ExceptionStackFrame *frame, bool isLowerEl)
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{
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if (isLowerEl) {
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currentCoreCtx->SetGuestFrame(frame);
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frame->cntp_ctl_el0 = THERMOSPHERE_GET_SYSREG(cntp_ctl_el0);
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frame->cntv_ctl_el0 = THERMOSPHERE_GET_SYSREG(cntv_ctl_el0);
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}
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}
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void ExceptionReturnPreprocess(ExceptionStackFrame *frame)
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{
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if (frame == currentCoreCtx->GetGuestFrame()) {
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if (currentCoreCtx->WasPaused()) {
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// Were we paused & are we about to return to the guest?
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IrqManager::EnterInterruptibleHypervisorCode();
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while (!debugManagerHandlePause());
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FpuRegisterCache::GetInstance().CleanInvalidate;
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}
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// Update virtual counter
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u64 ticksNow = 0;// TODO timerGetSystemTick();
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currentCoreCtx->IncrementTotalTimeInHypervisor(ticksNow - frame->cntpct_el0);
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UpdateVirtualOffsetSysreg();
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// Restore timer interrupt config
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THERMOSPHERE_SET_SYSREG(cntp_ctl_el0, frame->cntp_ctl_el0);
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THERMOSPHERE_SET_SYSREG(cntv_ctl_el0, frame->cntv_ctl_el0);
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}
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}
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void HandleLowerElSyncException(ExceptionStackFrame *frame)
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{
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auto esr = frame->esr_el2;
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switch (esr.ec) {
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case cpu::ExceptionSyndromeRegister::CP15RTTrap:
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traps::HandleMcrMrcCP15Trap(frame, esr);
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break;
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case cpu::ExceptionSyndromeRegister::CP15RRTTrap:
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traps::HandleMcrrMrrcCP15Trap(frame, esr);
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break;
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case cpu::ExceptionSyndromeRegister::CP14RTTrap:
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case cpu::ExceptionSyndromeRegister::CP14DTTrap:
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case cpu::ExceptionSyndromeRegister::CP14RRTTrap:
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// A32 stub: Skip instruction, read 0 if necessary (there are debug regs at EL0)
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traps::HandleA32CP14Trap(frame, esr);
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break;
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case cpu::ExceptionSyndromeRegister::HypervisorCallA64:
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traps::HandleHvc(frame, esr);
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break;
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case cpu::ExceptionSyndromeRegister::MonitorCallA64:
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traps::HandleSmc(frame, esr);
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break;
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case cpu::ExceptionSyndromeRegister::SystemRegisterTrap:
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traps::HandleMsrMrsTrap(frame, esr);
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break;
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case cpu::ExceptionSyndromeRegister::DataAbortLowerEl:
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// Basically, stage2 translation faults
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traps::HandleLowerElDataAbort(frame, esr);
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break;
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case cpu::ExceptionSyndromeRegister::SoftwareStepLowerEl:
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traps::HandleSingleStep(frame, esr);
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break;
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case cpu::ExceptionSyndromeRegister::BreakpointLowerEl:
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case cpu::ExceptionSyndromeRegister::WatchpointLowerEl:
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case cpu::ExceptionSyndromeRegister::SoftwareBreakpointA64:
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case cpu::ExceptionSyndromeRegister::SoftwareBreakpointA32:
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debugManagerReportEvent(DBGEVENT_EXCEPTION);
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break;
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default:
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DEBUG("Lower EL sync exception, EC = 0x%02llx IL=%llu ISS=0x%06llx\n", (u64)esr.ec, esr.il, esr.iss);
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DumpStackFrame(frame, false);
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break;
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}
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}
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void HandleSameElSyncException(ExceptionStackFrame *frame)
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{
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auto esr = frame->esr_el2;
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DEBUG("Same EL sync exception on core %x, EC = 0x%02x IL=%llu ISS=0x%06llx\n", currentCoreCtx->GetCoreId(), esr.ec, esr.il, esr.iss);
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DumpStackFrame(frame, true);
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}
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void HandleUnknownException(u32 offset)
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{
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DEBUG("Unknown exception on core %x! (offset 0x%03lx)\n", currentCoreCtx->GetCoreId(), offset);
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}
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}
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